Renesas M16C FAMILY series Hardware Manual page 169

16-bit single-chip microcomputer
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M
1
6
C
2 /
8
G
o r
u
p
(
M
1
6
C
(1) When the base timer is reset while the base timer increments the counter
Input waveform
(
When selects no
division with the divider by (n+1)
(2) When the base timer is reset while the base timer decrements the counter
Input waveform
(
When selects no
division with the divider by (n+1)
Figure 13.14 Base Timer Operation in Two-phase Pulse Signal Processing Mode
R
e
. v
2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
M
1
6
C
2 /
8
) B
P8
(A-phase)
0
P8
(B-phase)
1
f
BT1
)
INT1 (Z-phase)
Value of counter
P8
(A-phase)
0
P8
(B-phase)
1
f
BT1
)
INT1 (Z-phase)
Value of counter
NOTES:
1. 1.5 f
clock cycle or more are required.
BT1
page 149
f o
3
8
5
min 1 µs
min 1 µs
(Note 1)
Base timer starts counting
m
m+1
0
Set to "0" in this timing
min 1 µs
min 1 µs
(1)
Base timer starts counting
m
m-1
0
Set to "0" in this timing
1
2
Set to "1" in this timing
FFFF
FFFE
16
16
Set to "FFFF
" in this timing
16
13. Timer S

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