M
1
6
C
2 /
8
G
o r
u
p
(
M
1
6
C
1.4 Pin Assignment
Figures 1.5 to 1.7 show the pin Assignments (top view).
10
NOTES:
1. The numbers in each grid (circle) show the pin numbers of the M30280FAHP (PLQP0080KB-A (80P6Q-A))
2. Connect grids written as (Vss) to Vss(GND) or leave them open.
3. Set PACR2 to PACR0 bits in the PACR register to "011
When the PACR register is not set, the input and output function of
Figure 1.5 Pin Assignment (Top View) of 85-pin Package
R
e
. v
2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
M
1
6
C
2 /
8
) B
A
B
C
61
60
58
P0
P0
P1
6
7
1
62
63
59
9
P0
P0
P1
5
4
0
64
65
66
8
P0
P0
P0
3
2
1
67
68
69
7
P0
P10
P10
0
7
6
70
71
6
(11)
(2)
P10
P10
(Vss)
5
4
5
74
73
72
P10
P10
P10
1
2
3
77
76
75
4
V
P10
AVss
REF
0
78
79
4
3
AVcc
P9
P9
7
1
80
2
5
2
P9
P9
P9
6
3
0
1
3
6
1
P9
P9
CNVss
5
2
page 10
f o
3
8
5
D
E
F
G
5
52
50
47
P1
P1
P2
P2
4
7
1
4
5
53
51
48
P1
P1
P2
P2
3
6
0
3
5
54
49
(11)
(2)
P1
P1
(Vss)
P2
2
5
2
(11)
(2)
(Vss)
9
11
14
17
RESET
Vss
P8
P8
5
2
7
12
13
16
X
Vcc
P8
IN
3
P8
/X
7
CIN
8
10
13
15
X
Vcc
P8
OUT
4
P8
/X
6
COUT
" before you input and output it after resetting to each pin.
2
some pins are disabled.
Package: PTLG0085JB-A(85F0G)
H
J
K
44
42
38
P2
P6
P3
7
1
1
45
43
39
P2
P6
P3
6
0
0
46
41
40
P2
P6
P6
5
2
3
37
36
35
P3
P3
P3
2
3
4
34
33
32
P3
P3
P3
5
6
7
31
30
(11)
P6
P6
(2)
(Vss)
4
5
29
28
27
P6
P6
P7
6
7
0
26
25
24
P7
P7
P7
1
2
3
19
23
22
P8
P7
P7
0
4
5
18
21
20
P8
P7
P7
1
6
7
1. Overview