Clock Generation Circuit; Pll Frequency Synthesizer - Renesas M16C FAMILY series Hardware Manual
16-bit single-chip microcomputer
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- User manual (380 pages) ,
- Hardware manual (257 pages) ,
- User manual (103 pages)
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1
6
C
2 /
8
G
o r
u
p
(
M
1
6
C
20.2 Clock Generation Circuit
20.2.1 PLL Frequency Synthesizer
Stabilize supply voltage so that the standard of the power supply ripple is met.
Symbol
f
Power supply ripple allowable frequency(V
(ripple)
Power supply ripple allowable amplitude
V
p-p(ripple)
voltage
V
Power supply ripple rising/falling gradient
CC(|DV/DT|)
f
(ripple)
Power supply ripple allowable frequency
(V
)
CC
V
p-p(ripple)
Power supply ripple allowable amplitude
voltage
Figure 20.2 Voltage Fluctuation Timing
R
e
. v
2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
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1
6
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2 /
8
) B
Parameter
V
CC
page 352
f o
3
8
5
Min.
)
CC
(V
=5V)
CC
(V
=3V)
CC
(V
=5V)
CC
(V
=3V)
CC
f
(ripple)
20. Precautions
Standard
Unit
Typ.
Max.
10
kHz
0.5
V
0.3
V
0.3
V/ms
0.3
V/ms
V
p-p(ripple)
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