Renesas M16C FAMILY series Hardware Manual page 240

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
A/D Trigger Control Register
b7 b6 b5 b4 b3
NOTES:
1. If the ADTRGCON register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. Set "00 " in this register in one-shot mode, repeat mode, single sweep mode, repeat sweep mode 0 and repeat
16
sweep mode 1.
Figure 15.3 ADTRGCON Register
Table 15.2 A/D Conversion Frequency Select
C K S 2 C
0
0
0
0
1
1
1
1
NOTE:
1. Set the φAD frequency to 10 MHz or less (12 MHz or less in M16C/28B) The selected φAD the
ADCON0 register, CKS1 bit in the ADCON1 register, and the CKS2 bit in the ADCON2 register.
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
(1, 2)
b2 b1 b0
Symbol
ADTRGCON
Bit Symbol
A/D Operation Mode
SSE
Select Bit 2
A/D Operation Mode
DTE
Select Bit 3
AN0 Trigger Select Bit
HPTRG0
AN1 Trigger Select Bit
HPTRG1
Nothing is assigned. When write, set to "0".
(b7-b4)
When read, its content is "0".
K S 1 C K S 0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
page 220
f o 3 8 5
Address After Reset
03D2 00
16 16
Bit Name
0 : Other than simultaneous sample sweep
mode or delayed trigger mode 0,1
1 : Simultaneous sample sweep mode or
delayed trigger mode 0,1
0 : Other than delayed trigger mode 0,1
1 : Delayed trigger mode 0,1
Function varies with each operation mode
Function varies with each operation mode
Ø A D
D v i d i e d b - y 4 - f o A f D
D v i d i e d b - y 2 - f o A f D
A f D
D v i d i e d b - y 1 - 2 f o A f D
D v i d i e d b - y 6 - f o A f D
D v i d i e d b - y 3 - f o A f D
15. A/D Converter
Function
RW
RW
RW
RW
RW