Renesas M16C FAMILY series Hardware Manual page 70

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
PLL Control Register 0
b7 b6 b5 b4 b3
0 0 1
NOTES:
1. Write to this register after setting the PRC0 bit of PRCR register to "1" (write enable).
2. When the PM21 bit in the PM2 register is "1" (clock modification disable), writing to this register has no effect.
3. These three bits can only be modified when the PLC07 bit is set to "0" (PLL turned off). The value once written to
this bit cannot be modified.
4. Before setting this bit to "1" , set the CM07 bit to "0" (main clock), set the CM17 to CM16 bits to "00
clock undivided mode), and set the CM06 bit to "0" (CM16 and CM17 bits enable).
Figure 7.7 PLC0 Register
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
(1,2)
b2 b1 b0
Symbol
PLC0
Bit
Symbol
PLL multiplying factor
PLC00
select bit
PLC01
PLC02
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
(b3)
Reserved bit
(b4)
Reserved bit
(b6-b5)
PLC07 Operation enable bit
page 50
f o 3 8 5
Address
001C
16
Bit Name
b2 b1b0
0 0 0: Do not set
(3)
0 0 1: Multiply by 2
0 1 0: Multiply by 4
0 1 1:
1 0 0:
1 0 1:
Do not set
1 1 0:
1 1 1:
Set to "1"
Set to "0"
0: PLL Off
(4)
1: PLL On
7. Clock Generation Circuit
After Reset
0001 X010
2
Function
RW
RW
RW
RW
RW
RW
RW
" (main
2