Renesas M16C FAMILY series Hardware Manual page 278

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
2
I C0 Start/stop Condition Control Register
b7 b6 b5 b4 b3
NOTES:
1. Do not set "00000
Figure 16.8 S2D0 Register
Table 16.2 Recommended setting (SSC4-SSC0) start/stop condition at each oscillation frequency
2
Oscillation
I C bus system I
(MHz)
f1 clock select
10 1 / 2
8 1 / 2
8 1 / 8
4 1 / 2
2 1 / 2
NOTES:
1. Do not set odd values or "00000
2. When the PCLK0 bit in the PCLKR register is set to "1".
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
b2 b1 b0
Symbol
S2D0
Bit Symbol
SSC0 START/STOP Condition
Setting Bits
SSC1
SSC2
SSC3
SSC4
S
CL
SIP
Select Bit
S
CL
SIS
Bit
STSP
START/STOP Condition
SEL
Generation Select Bit
" or odd values.
2
2
SSC4-SSC0
C bus system
clock(MHz)
f1 (2)
5 XXX11110
f1 (2)
4 XXX11010
XXX11000
f1 (2)
1 XXX00100
f1 (2)
2 XXX01100
XXX01010
f1 (2)
1 XXX00100
" to START/STOP condition setting bits(SSC4 to SSC0)
2
page 258
f o 3 8 5
16. MULTI-MASTER I
Address
02E5
16
Bit Name
Setting for detection condition
(1)
of START/STOP condition.
See Table 16.2.
0: Active in falling edge
/S Interrupt Pin Polarity
DA
1: Active in rising edge
/S Interrupt Pin Select 0: S
DA
1: S
0: Short setup/hold time mode
1: Long setup/hold time mode
(1)
SCL release
time (cycle)
6.2 µs (31)
6.75 µs(27)
6.25 µs(25)
5.0 µs (5)
6.5 µs (13)
5.5 µs (11)
5.0 µs (5)
2
C bus INTERFACE
After Reset
00011010
2
Function
RW
RW
RW
RW
RW
RW
RW
enabled
DA
RW
enabled
CL
RW
Setup time
(cycle)
3.2 µs (16)
3.5 µs (14) 3.25 µs(13)
3.25 µs (13) 3.0 µs (12)
3.0 µs (3) 2.0 µs (2)
3.5 µs (7) 3.0 µs (6)
3.0 µs (6) 2.5 µs (5)
3.0 µs (3) 2.0 µs (2)
Hold time
(cycle)
3.0 µs (15)