M
1
6
C
2 /
8
G
o r
u
p
(
M
1
6
C
1.2 Block Diagram
Figure 1.1 is a block diagram of the M16C/28 Group, 80-pin and 85-pin packages.
Figure 1.2 is a block diagram of the M16C/28 Group, 64-pin package.
I/O Ports
Internal Peripheral Functions
Timer (16 bits)
Output (Timer A) : 5
Input (Timer B) : 3
3-phase PWM
Timer S
Input capture/
(
Output compare
Time measurement : 8 channels
Waveform generating : 8 channels
A/D converter
(10 bits x 24 channels)
Watchdog timer
(15 bits)
DMAC
(2 channels)
Figure 1.1 M16C/28 Group Block Diagram (80-Pin Package and 85-Pin Package)
R
e
. v
2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
M
1
6
C
2 /
8
) B
Port P0
UART/clock synchronous SI/O
(8 bits x 3 channels)
Clock synchronous SI/O
(8 bits x 2 channels)
Multi-master I
)
M16C/60 Series CPU Core
R0H
R1H
R2
R3
FB
page 4
f o
3
8
5
8
8
Port P1
System clock generator
PLL frequency synthesizer
2
C bus
R0L
SB
R1L
USP
ISP
INTB
A0
PC
A1
FLG
NOTES:
8
8
Port P3
Port P2
X
-X
IN
OUT
X
-X
CIN
COUT
On-chip oscillator
Memory
(1)
ROM
(2)
RAM
Multiplier
1. ROM size depends on MCU type.
2. RAM size depends on MCU type.
1. Overview