Count Source Protective Mode - Renesas M16C/6NK Hardware Manual

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
Watchdog Timer Control Register
b7 b6 b5 b4 b3 b2
0 0
Watchdog Timer Start Register
b7
NOTE
1. Write to the WDTS register after the watchdog timer interrupt request is generated.
Figure 11.2 WDC Register and WDTS Register

11.1 Count Source Protective Mode

In this mode, a on-chip oscillator clock is used for the watchdog timer count source. The watchdog timer
can be kept being clocked even when CPU clock stops as a result of runaway.
Before this mode can be used, the following register settings are required:
(1) Set the PRC1 bit in the PRCR register to "1" (enable writes to the PM1 and PM2 registers).
(2) Set the PM12 bit in the PM1 register to "1" (reset when the watchdog timer underflows).
(3) Set the PM22 bit in the PM2 register to "1" (on-chip oscillator clock used for the watchdog timer count source).
(4) Set the PRC1 bit in the PRCR register to "0" (disable writes to the PM1 and PM2 registers).
(5) Write to the WDTS register (watchdog timer starts counting).
Setting the PM22 bit to "1" results in the following conditions:
• The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer
count source.
Watchdog timer period =
• The CM10 bit in the CM1 register is disabled against write. (Writing a "1" has no effect, nor is stop mode entered.)
• The watchdog timer does not stop when in wait mode or hold state.
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
b1 b0
Symbol
WDC
Bit Symbol
-
High-order Bit of Watchdog Timer
(b4-b0)
-
Reserved Bit
(b6-b5)
WDC7 Prescaler Select Bit
(1)
b0
Symbol
WDTS
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to "7FFFh" regardless
of whatever value is written.
Watchdog timer count (32768)
on-chip oscillator clock
page 102 of 378
Address After Reset
000Fh 00XXXXXXb
Bit Name
Set to "0"
0 : Divided by 16
1 : Divided by 128
Address After Reset
000Eh Indeterminate
Function
11. Watchdog Timer
Function
RW
RO
RW
RW
RW
WO