Renesas M16C FAMILY series Hardware Manual page 277

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
2
I C0 Control Register 2
b7 b6 b5 b4
NOTES:
1. When the PCLK0 bit in the PCLKR register is set to "0", f
Figure 16.7 S4D0 Register
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
b3 b2 b1 b0
Symbol
S4D0
Bit Symbol
Time Out Detection
TOE
Function Enable Bit
TOF
Time Out Detection Flag
TOSEL Time Out Detection Time
Select Bit
2
ICK2
I
Select Bits
ICK3
ICK4
Reserved bit
(b6)
STOP Condition Detection
Interrupt Request Bit
SCPIN
page 257
f o 3 8 5
Address
02E7
16
Bit Name
0 : Disabled
1 : Enabled
0 : Not detected
1 : Detected
0 : Long time
1 : Short time
b5 b4 b3
C bus System Clock
0 0 0 V
0 0 1 V
0 1 0 V
0 1 1 V
1 0 0 V
Set to "0"
0 : No I
1 : I
= f . When the PCLK0 bit is set to "1", f
IIC 2
2
16. MULTI-MASTER I C bus INTERFACE
After Reset
00
16
Function
set by ICK1 and ICK0
IIC
bits in S3D0 register
= 1/2.5 f
IIC IIC
= 1/3 f
IIC IIC
= 1/5 f
IIC IIC
(1)
= 1/6 f
IIC IIC
2
C bus interface interrupt
request
2
C bus interface interrupt
request
IIC
RW
RW
RO
RW
RW
RW
RW
RW
RW
=f .
1