Renesas M16C FAMILY series Hardware Manual page 145

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
Three-phase PWM Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
NOTES:
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable). Note also that this
register can only be rewritten when timers A1, A2, A4 and B2 are idle.
2. A start trigger is generated by writing to the TB2 register only while timer B2 stops.
3. The effects of the INV11 bit are described in the table below.
Item
Mode
TA11, TA21, TA41 registers
INV00 bit, INV01 bit
INV13 bit
4. If the INV06 bit is "1" (sawtooth wave modulation mode), set this bit to "0" (three-phase mode 0). Also, if the
INV11 bit is "0", set the PWCON bit to "0" (timer B2 reloaded by a timer B2 underflow).
5. The INV13 bit is effective only when the INV06 bit is "0" (triangular wave modulation mode) and the INV11 bit
is "1" (three-phase mode 1).
6. If all of the following conditions hold true, set the INV16 bit to "1" (dead time timer triggered by the rising edge
of three-phase output shift register output)
• The INV15 bit is "0" (dead time timer enabled)
• When the INV03 bit is set to "1" (three-phase motor control timer output enabled), the Dij bit and DiBj bit (i:
U, V, or W, j: 0 to 1) have always different values (the positive-phase and negative-phase always output
different levels during the period other than dead time).
Conversely, if either one of the above conditions holds false, set the INV16 bit to "0" (dead time timer triggered
by the falling edge of one-shot pulse).
Figure 12.27 INVC1 Register
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
(1)
Symbol Address
INVC1 0349
Bit Symbol
Timer A1, A2, A4 start
INV10
trigger signal select bit
Timer A1-1, A2-1, A4-1
INV11
control bit
Dead time timer count
INV12
source select bit
Carrier wave detect flag
INV13
Output polarity control bit
INV14
Dead time invalid bit
INV15
Dead time timer trigger
select bit
INV16
Reserved bit
(b7)
Three-phase mode 0
Not Used
Has no effect. ICTB2 counted every time
timer B2 underflows regardless of
whether the INV00 to INV01 bits are set.
Has no effect
page 125
f o 3 8 5
After Reset
00
16 16
Bit Name
0: Timer B2 underflow
1: Timer B2 underflow and write to the
TB2 register
0: Three-phase mode 0
(2)
1: Three-phase mode 1
0 : f or f
1
1 : f divided by 2 or f
1
0: Timer Reload control signal is set to "0"
1: Timer Reload control signal is set to "1"
(4)
0 : Output waveform "L" active
1 : Output waveform "H" active
0: Dead time timer enabled
1: Dead time timer disabled
0: Falling edge of timer A4, A1 or A2
one-shot pulse
1: Rising edge of three-phase output shift
register (U, V or W phase) output
This bit should be set to "0"
INV11=0
Function
2
divided by 2
2
INV11=1
Three-phase mode 1
Used
Effect
Effective when INV11 bit is "1" and
INV06 bit is "0"
12. Timer
RW
RW
(3)
RW
RW
RO
RW
RW
RW
(5)
RW