Renesas M16C FAMILY series Hardware Manual page 139

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
Count source
Measurement pulse
Reload register
transfer timing
Timing at which counter
reaches "0000 "
16
TBiS bit
TBiIC register's
IR bit
TBiMR register's
MR3 bit
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
i = 0 to 2
NOTES:
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are "00
interval from falling edge to falling edge of the measurement pulse).
Figure 12.21 Operation timing when measuring a pulse period
Count source
Measurement pulse
Reload register counter
transfer timing
Timing at which counter
reaches "0000 "
16
TBiS bit
TBiIC register's
IR bit
The MR3 bit in the
TBiMR register
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
i = 0 to 2
NOTES:
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are "10
from a falling edge to the next rising edge and the interval from a rising edge to the next falling edge of the
measurement pulse).
Figure 12.22 Operation timing when measuring a pulse width
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
"H"
"L"
counter
"1"
"0"
"1"
"0"
Set to "0" upon accepting an interrupt request or by program
"1"
"0"
"H"
"L"
"1"
"0"
"1"
"0"
Set to "0" upon accepting an interrupt request or by
program
"1"
"0"
page 119
f o 3 8 5
Transfer
(indeterminate value)
(1)
Transfer
Transfer Transfer
(measured value)
(indeterminate (measured
value) value)
(1) (1)
Transfer
(measured value)
(1)
" (measure the
2
Transfer
(measured value)
(1) (1) (1)
" (measure the interval
2
12. Timer
(2)