A/D Converter - Renesas M16C FAMILY series Hardware Manual

M 1 6 C 2 / 8 G o r u p ( M 1 6 C

20.9 A/D Converter

1. Set ADCON0 (except bit 6), ADCON1, ADCON2 and ADTRGCON registers when A/D conversion is
stopped (before a trigger occurs).
2. When the VCUT bit in ADCON1 register is changed from "0" (Vref not connected) to "1" (Vref con-
nected), start A/D conversion after passing 1 µs or longer.
3. To prevent noise-induced device malfunction or latchup, as well as to reduce conversion errors, insert
capacitors between the AV
AV pin. Similarly, insert a capacitor between the V
SS
connection of each pin.
4. Make sure the port direction bits for those pins that are used as analog inputs are set to "0" (input
mode). Also, if the TGR bit in the ADCON0 register is set to "1" (external trigger), make sure the port
direction bit for the AD
5. When using key input interrupts, do not use any of the four AN
input interrupt request is generated when the A/D input voltage goes low.)
6. The φ
frequency must be 10 MHz or less. For M16C/28B, set it 12 MHz or less. Without sample-and-
AD
hold function, limit the φ
φ
frequency to 1MH
AD
7. When changing an A/D operation mode, select analog input pin again in the CH2 to CH0 bits of
ADCON0 register and the SCAN1 to SCAN0 bits of ADCON1 register.
Figure 20.5 Use of capacitors to reduce noise
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
, V , and analog input pins (AN
CC REF
___________
pin is set to "0" (input mode).
TRG
frequency to 250kH
AD
or more.
Z
MCU
V
CC
V
CC
C4
V
SS
ANi: ANi, AN0i, AN2i (i = 0 to 7), and AN3i ( i= 0 to 2)
NOTES:
1. C1 ≥ 0.47 µF, C2 ≥ 0.47 µF, C3 ≥ 100 pF, C4 ≥ 0.1 µF (reference)
2. Use thick and shortest possible wiring to connect capacitors.
page 369
f o 3 8 5
, AN0
i
pin and the V
CC
to AN
4
or more. With the sample and hold function, limit the
Z
V
AV
CC
V
REF
C2
C1
AV
SS
C3
ANi
20. Precautions
, AN2 (i=0 to 7)) each and the
i i
pin. Figure 20.5 is an example
SS
pins as analog inputs. (A key
7
CC