Fpga Interfaces - Altera cyclone V Technical Reference

2016.10.28
cv_5v4
Subscribe
You instantiate the hard processor system (HPS) component in Qsys. The HPS is available in the Qsys IP
catalog under Processor and Peripherals > Hard Processor Systems. This chapter describes the
parameters available in the HPS component parameter editor, which opens when you add or edit an HPS
component.
Related Information
http://www.altera.com/literature/hb/qts/quartusii_handbook.pdf
For general information about using Qsys, refer to the Creating a System with Qsys chapter in the
Quartus Prime Handbook.
®

FPGA Interfaces

The FPGA Interfaces tab is one of four tabs on the HPS component. This tab contains several groups with
the following parameters:
Figure 27-1: FPGA Interface Tab
2016 Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Megacore, NIOS, Quartus and Stratix words and logos
©
are trademarks of Intel Corporation in the US and/or other countries. Other marks and brands may be claimed as the property of others. Intel warrants
performance of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make
changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of
device specifications before relying on any published information and before placing orders for products or services.
www.altera.com
101 Innovation Drive, San Jose, CA 95134
Instantiating the HPS Component
Send Feedback
27
ISO
9001:2008
Registered