Dma Mode - Altera cyclone V Technical Reference

25-8

DMA Mode

Register Type
Message buffer
DMA Mode
The CAN controller can issue DMA controller requests to transfer data between one or both of the
message interface registers and system memory. The CAN controller has two DMA request interfaces,
called
can_if1dma
DMA peripheral request interfaces. To use the DMA peripheral request interface, the host processor must
access the CAN control register (
interface is selected through the system manager.
To activate the DMA support feature and initiate a transfer, write a 1 to the
appropriate IF command register (
object transfer is completed, the CAN controller issues a DMA peripheral request to perform the next
message object transfer. The request remains active until the first read or write to the message interface
register.
Related Information
System Manager
•
• DMA Controller
Automatic Retransmission
The CAN controller provides a means for automatic retransmission of frames that have lost arbitration or
have errors during transmission. Retransmission happens automatically without user intervention or
notification. Normal confirmation is given when the transmission is successfully complete.
Test Mode
To enable test mode, set the test mode enable bit (
write access to the CAN test register (
Altera Corporation
Register
IFx mask register
IFxMSK
IFx arbitration
IFxARB
register
IFx message
IFxMCTR
control register
IFx data A register Provides access to data bytes 0-3 of the
IFxDA
IFx data B register Provides access to data bytes 4-7 of the
IFxDB
and . The CAN peripheral request interfaces are shared with the FPGA
can_if2dma
CCTRL
IFxCMR
on page 5-1
on page 16-1
CTR
Name
Provides access to the
mask fields of the message object
Provides access to the
arbitration fields of the message object
Provides access to the
,
RxIE TxIE
fields of the message object
NewDat
message object
message object
) in the protocol group (
protogrp
) in the message interface group (
) in the
Test CCTRL
).
Description
, , and
Msk MDir
, , , and
ID Dir Xtd
, ,
DLC EoB TxRqst
, , ,
UMask IntPnd MsgLst
). The peripheral request
bit in the
DMAactive
). After the message
msgifgrp
register to 1. This action activates
cv_5v4
2016.10.28
MXtd
MsgVal
, ,
RmtEn
, and
CAN Controller
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