Altera cyclone V Technical Reference page 3048

20-30
ic_tar
31 30
15 14
Reserved
ic_tar Fields
Bit
12
ic_10bitaddr_master
11
special
10
gc_or_start
Altera Corporation
29 28 27 26
13 12 11 10
ic_ speci gc_
10bit al or_
addr_ start
RW
maste
0x0 RW
r
0x0
RW
0x1
Name
This bit controls whether the i2c starts its transfers in
7-bit or 10-bit addressing mode when acting as a
master.
Value
0x0
0x1
This bit indicates whether software performs a
General Call or START BYTE command.
Value
0x0
0x1
If bit 11 (SPECIAL) of this Register is set to 1, then
this bit indicates whether a General Call or START
byte command is to be performed by the I2C or
General Call Address after issuing a General Call,
only writes may be performed. Attempting to issue a
read command results in setting bit 6 (TX_ABRT) of
the Raw Interrupt_Status register. The I2C remains in
General Call mode until the special bit value (bit 11)
is cleared.
0x0
0x1
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Description
Description
Master Address, 7bit
Master Address, 10bit
Description
Ignore bit 10 gc_or_start and use ic_tar
normally
Perform special I2C command as specified in
gc_or_start
Value Description
General Call
START Byte
21 20 19 18
5 4 3 2
ic_tar
RW 0x55
Access
cv_5v4
2016.10.28
17 16
1 0
Reset
RW 0x1
RW 0x0
RW 0x0
I2C Controller
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