Microchip Technology megaAVR 0 Series Manual page 91

9.5.8 32.768 kHz Crystal Oscillator Control A
Name: XOSC32KCTRLA
Offset: 0x1C
Reset: 0x00
Property: Configuration Change Protection
The SEL and CSUT bits cannot be changed as long as the ENABLE bit is set or the XOSC32K Stable bit
(XOSC32KS) in CLKCTRL.MCLKSTATUS is high.
To change settings in a safe way: write a '0' to the ENABLE bit and wait until XOSC32KS is '0' before re-
enabling the XOSC32K with new settings.
Bit 7
Access
Reset
Bits 5:4 – CSUT[1:0] Crystal Start-Up Time
These bits select the start-up time for the XOSC32K. It is write protected when the oscillator is enabled
(ENABLE=1).
If SEL=1, the start-up time will not be applied.
Value Name
0x0 1K
0x1 16K
0x2 32K
0x3 64K
Bit 2 – SEL Source Select
This bit selects the external source type. It is write protected when the oscillator is enabled (ENABLE=1).
Value Description
0 External crystal
1 External clock on TOSC1 pin
Bit 1 – RUNSTDBY Run Standby
Writing this bit to '1' starts the crystal oscillator and forces the oscillator ON in all modes, even when
unused by the system if the ENABLE bit is set. In Standby Sleep mode this can be used to ensure
immediate wake-up and not waiting for oscillator start-up time. When this bit is '0', the crystal oscillator is
only running when requested and the ENABLE bit is set.
The output of XOSC32K is not sent to other peripherals unless it is requested by one or more peripherals.
When the RUNSTDBY bit is set there will only be a delay of two to three crystal oscillator cycles after a
request until the oscillator output is received, if the initial crystal start-up time has already completed.
According to RUNSTBY bit, the oscillator will be turned ON all the time if the device is in Active, Idle, or
Standby Sleep mode, or only be enabled when requested.
This bit is I/O protected to prevent unintentional enabling of the oscillator.
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2018 Microchip Technology Inc.
6 5
CSUT[1:0]
R/W
0
4 3
R/W
0
Description
1k cycles
16k cycles
32k cycles
64k cycles
Datasheet Preliminary
®
megaAVR 0-Series
Clock Controller (CLKCTRL)
2 1
SEL RUNSTDBY
R/W R/W
0 0
DS40002015A-page 91
0
ENABLE
R/W
0