Figure 19-9. Frequency Waveform Generation
MAX
TOP
CNT
BOTTOM
WG Output
f
The waveform frequency (f
=
CLK_PER
2 CMPn+1
FRQ
where N represents the prescaler divider used (CLKSEL in TCAn.CTRLA), and f
clock for the peripherals.
The maximum frequency of the waveform generated is half of the peripheral clock frequency (f
when TCAn.CMPn is written to zero (0x0000) and no prescaling is used (N=1, CLKSEL=0x0 in
TCAn.CTRLA).
Single-Slope PWM Generation
For single-slope Pulse-Width Modulation (PWM) generation, the period (T) is controlled by TCAn.PER,
while the values of TCAn.CMPn control the duty-cycle of the WG output. The figure below shows how the
counter counts from BOTTOM to TOP and then restarts from BOTTOM. The waveform generator (WO)
output is set at TOP and cleared on the compare match between the TCAn.CNT and TCAn.CMPn
registers.
Figure 19-10. Single-Slope Pulse-Width Modulation
MAX
TOP
CNT
CMPn
BOTTOM
Output WOn
The TCAn.PER register defines the PWM resolution. The minimum resolution is 2 bits
(TCA.PER=0x0003), and the maximum resolution is 16 bits (TCA.PER=MAX).
log PER+1
The following equation calculates the exact resolution for single-slope PWM (R
=
log 2
PWM_SS
The single-slope PWM frequency (f
peripheral clock frequency f
the following equation where N represents the prescaler divider used:
©
2018 Microchip Technology Inc.
Period (T)
) is defined by the following equation:
FRQ
Period (T)
CMPn=BOTTOM
) depends on the period setting (TCA_PER), the system's
PWM_SS
, and the TCA prescaler (CLKSEL in TCAn.CTRLA). It is calculated by
CLK_PER
Datasheet Preliminary
megaAVR
16-bit Timer/Counter Type A (TCA)
Direction change
CNT written
CMPn=TOP
®
0-Series
"update"
is the system
CLK_PER
/2)
CLK_PER
"update"
"match"
):
PWM_SS
DS40002015A-page 191
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