Microchip Technology megaAVR 0 Series Manual page 417

� =
13 + SAMPDLY + SAMPLEN
S
Figure 28-10. ADC Timing Diagram - Free-Running Conversion
Cycle Number
ADC clock
ADC enable
Input event
STCONV
RESRDY IF
RESH
RESL
28.3.2.4 Changing Channel or Reference Selection
The MUXPOS bits in the ADCn.MUXPOS register and the REFSEL bits in the ADCn.CTRLC register are
buffered through a temporary register to which the CPU has random access. This ensures that the
channel and reference selections only take place at a safe point during the conversion. The channel and
reference selections are continuously updated until a conversion is started.
Once the conversion starts, the channel and reference selections are locked to ensure sufficient sampling
time for the ADC. Continuous updating resumes in the last CLK_ADC clock cycle before the conversion
completes (RESRDY in ADCn.INTFLAGS is set). The conversion starts on the following rising CLK_ADC
clock edge after the STCONV bit is written to '1'.
ADC Input Channels
When changing channel selection, the user should observe the following guidelines to ensure that the
correct channel is selected:
In Single Conversion mode: The channel should be selected before starting the conversion. The channel
selection may be changed one ADC clock cycle after writing '1' to the STCONV bit.
In Free-Running mode: The channel should be selected before starting the first conversion. The channel
selection may be changed one ADC clock cycle after writing '1' to the STCONV bit. Since the next
conversion has already started automatically, the next result will reflect the previous channel selection.
Subsequent conversions will reflect the new channel selection.
The ADC requires a settling time after switching the input channel - refer to the Electrical Characteristics
section for details.
ADC Voltage Reference
The reference voltage for the ADC (V
exceed the selected V
ADC this value is 0x3FF.
V can be selected by writing the Reference Selection bits (REFSEL) in the Control C register
REF
(ADCn.CTRLC) as either V
peripheral. V
DD
When using the external reference voltage V
VREF.CTRLn register to the value that is closest, but above the applied reference voltage. For external
references higher than 4.3V, use ADCnREFSEL[0:2] = 0x3.
©
2018 Microchip Technology Inc.
�
CLK_ADC
1
sample
REF
will be converted to the maximum result value of the ADC. For an ideal 10-bit
REF
, external reference V
DD
is connected to the ADC through a passive switch.
Analog-to-Digital Converter (ADC)
2 3 4 6
5 7 8
) controls the conversion range of the ADC. Input voltages that
, or an internal reference from the VREF
REFA
, configure ADCnREFSEL[0:2] in the corresponding
REFA
Datasheet Preliminary
®
megaAVR
9 13 1 2
10 11 12
Result MSB
Result LSB
conversion
complete
DS40002015A-page 417
0-Series