Microchip Technology megaAVR 0 Series Manual page 369

24.5.15 Slave Address Mask
Name: SADDRMASK
Offset: 0x0E
Reset: 0x00
Property: -
Bit 7
Access R/W
Reset 0
Bits 7:1 – ADDRMASK[6:0] Address Mask
The ADDRMASK register acts as a second address match register, or an address mask register
depending on the ADDREN setting.
If ADDREN is written to '0', ADDRMASK can be loaded with a 7-bit Slave Address mask. Each of the bits
in the TWIn.SADDRMASK register can mask (disable) the corresponding address bits in the TWI slave
Address Register (TWIn.SADDR). If the mask bit is written to '1' then the address match logic ignores the
compare between the incoming address bit and the corresponding bit in slave TWIn.SADDR register. In
other words, masked bits will always match.
If ADDREN is written to '1', the TWIn.SADDRMASK can be loaded with a second slave address in
addition to the TWIn.SADDR register. In this mode, the slave will match on two unique addresses, one in
TWIn.SADDR and the other in TWIn.SADDRMASK.
Bit 0 – ADDREN Address Mask Enable
If this bit is written to '1', the slave address match logic responds to the two unique addresses in slave
TWIn.SADDR and TWIn.SADDRMASK.
If this bit is '0', the TWIn.SADDRMASK register acts as a mask to the TWIn.SADDR register.
©
2018 Microchip Technology Inc.
6 5
ADDRMASK[6:0]
R/W R/W
0 0
4 3
R/W R/W
0 0
Datasheet Preliminary
®
megaAVR 0-Series
Two-Wire Interface (TWI)
2 1
ADDREN
R/W R/W
0 0
DS40002015A-page 369
0
R/W
0