Microchip Technology megaAVR 0 Series Manual page 390

26.5.2 Sequential Control 0
Name: SEQCTRL0
Offset: 0x01
Reset: 0x00
Property: Enable-Protected
Bit 7
Access R/W
Reset 0
Bits 0:3, 4:7 – SEQSEL Sequential Selection
The bits in SEQSELn select the sequential configuration for LUT[2n] and LUT[2n+1].
Value Name
0x0 DISABLE
0x1 DFF
0x2 JK
0x3 LATCH
0x4 RS
Other -
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2018 Microchip Technology Inc.
6 5
SEQSEL1[3:0]
R/W R/W
0 0
Description
Sequential logic is disabled
D flip flop
JK flip flop
D latch
RS latch
Reserved
CCL – Configurable Custom Logic
4 3
R/W R/W
0 0
Datasheet Preliminary
®
megaAVR 0-Series
2 1
SEQSEL0[3:0]
R/W R/W
0 0
DS40002015A-page 390
0
R/W
0