Microchip Technology megaAVR 0 Series Manual page 284

Figure 22-2. Clock Generation Logic Block Diagram
BAUD Rate
CLK_PER
PORT_INV
xcki
XCK
Pin
xcko
DDR_XCK
Internal Clock Generation - The Fractional Baud Rate Generator
The Baud Rate Generator is used for internal clock generation for Asynchronous modes, Asynchronous
Master mode, and Master SPI mode operation. The output frequency generated (f
the baud register value (USARTn.BAUD) and the peripheral clock frequency (f
table contains equations for calculating the baud rate (in bits per second) and for calculating the
USARTn.BAUD value for each mode of operation. It also shows the maximum baud rate versus
peripheral clock frequency. For asynchronous operation, the USARTn.BAUD register value is 16 bits. The
10 MSb (BAUD[15:6]) hold the integer part, while the six LSb (BAUD[5:0]) hold the fractional part. In
Synchronous mode, only the integer part of the BAUD register determine the baud rate.
Table 22-1. Equations for Calculating Baud Rate Register Setting
Operating Mode Conditions
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Asynchronous
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Synchronous
S is the number of samples per bit. In Asynchronous operating mode (CMODE[0]=0), it could be set as
16 (NORMAL mode) or 8 (CLK2X mode) by RXMODE in USARTn.CTRLB. For Synchronous operating
mode (CMODE[0]=1), S equals 2.
External Clock
An External clock (XCK) is used in Synchronous Slave mode operation. The XCK clock input is sampled
on the peripheral clock frequency and the maximum XCK clock frequency (f
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2018 Microchip Technology Inc.
Universal Synchronous and Asynchronous Recei...
BAUD
f
BAUD
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Sync Edge
Register Detector
Baud Rate (Bits Per Seconds) USART.BAUD Register Value
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Datasheet Preliminary
megaAVR
RXMODE
/2 /4 /2
DDR_XCK
Calculation
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0-Series
0
0
1
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CMODE[0]
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) is determined by
BAUD
). The following
CLK_PER
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XCK
DS40002015A-page 284