Microchip Technology megaAVR 0 Series Manual

Introduction

The ATmega3208/3209/4808/4809 microcontrollers of the megaAVR
processor with hardware multiplier, running at up to 20 MHz, with a wide range of Flash sizes up to 48
KB, up to 6 KB of SRAM, and 256 bytes of EEPROM in 28-, 32-, or 48-pin package. The series uses the
latest technologies from Microchip with a flexible and low-power architecture including Event System and
SleepWalking, accurate analog features and advanced peripherals.
This Manual contains the general descriptions of the peripherals. While the available peripherals have
identical features and show the same behavior across the series, packages with fewer pins support a
subset of signals. Refer to the Data Sheet of the individual device for available pins and signals.

Features

®
• AVR CPU
– Single-cycle I/O access
– Two-level interrupt controller
– Two-cycle hardware multiplier
• Memories
– Up to 48 KB In-system self-programmable Flash memory
– 256B EEPROM
– Up to 6 KB SRAM
– Write/Erase endurance:
• Flash 10,000 cycles
• EEPROM 100,000 cycles
– Data retention: 20 Years at 85°C
• System
– Power-on Reset (POR) circuit
– Brown-out Detection (BOD)
– Clock options:
• Lockable 20 MHz low power internal oscillator
• 32.768 kHz Ultra Low-Power (ULP) internal oscillator
• 32.768 kHz external crystal oscillator
• External clock input
– Single-pin Unified Program Debug Interface (UPDI)
– Three sleep modes:
• Idle with all peripherals running and mode for immediate wake-up time
©
2018 Microchip Technology Inc.
megaAVR
Manual
®
Datasheet Preliminary
® 0-Series
0-series are using the AVR
DS40002015A-page 1
®