Register Summary - Updi; Register Description - Microchip Technology megaAVR 0 Series Manual

29.4

Register Summary - UPDI

Offset Name Bit Pos.
0x00 STATUSA
0x01 STATUSB
0x02 CTRLA
0x03 CTRLB
0x04
... Reserved
0x06
0x07 ASI_KEY_STATUS
0x08 ASI_RESET_REQ
0x09 ASI_CTRLA
0x0A ASI_SYS_CTRLA
0x0B ASI_SYS_STATUS
0x0C ASI_CRC_STATUS
29.5

Register Description

These registers are readable only through the UPDI with special instructions and are NOT readable
through the CPU.
Registers at offset addresses 0x0-0x3 are the UPDI Physical configuration registers.
Registers at offset addresses 0x4-0xC are the ASI level registers.
©
2018 Microchip Technology Inc.
7:0 UPDIREV[3:0]
7:0
7:0 IBDLY
7:0
7:0
7:0
7:0
7:0
7:0
7:0
Unified Program and Debug Interface (UPDI)
PARD DTD RSD
NACKDIS CCDETDIS
UROWWRITE NVMPROG CHIPERASE
RSTREQ[7:0]
RSTSYS INSLEEP NVMPROG UROWPROG
Datasheet Preliminary
®
megaAVR 0-Series
PESIG[2:0]
GTVAL[2:0]
UPDIDIS
UPDICLKSEL[1:0]
UROWWRITE
_FINAL
LOCKSTATUS
CRC_STATUS[2:0]
DS40002015A-page 461
CLKREQ