Microchip Technology megaAVR 0 Series Manual page 217

19.6.18 Compare n Buffer Register
Name: CMPnBUF
Offset: 0x38 + n*0x02 [n=0..2]
Reset: 0x00
Property: -
This register serves as the buffer for the associated compare registers (TCAn.CMPn). Accessing any of
these registers using the CPU or UPDI will affect the corresponding CMPnBV status bit.
The TCAn.CMPnBUFL and TCAn.CMPnBUFH register pair represents the 16-bit value, TCAn.CMPnBUF.
The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be
accessed at offset + 0x01.
Bit 15
Access
R/W
Reset 0
Bit 7
Access R/W
Reset 0
Bits 15:8 – CMPBUF[15:8] Compare High Byte
These bits hold the MSB of the 16-bit compare buffer register.
Bits 7:0 – CMPBUF[7:0] Compare Low Byte
These bits hold the LSB of the 16-bit compare buffer register.
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2018 Microchip Technology Inc.
14 13
R/W R/W
0 0
6 5
R/W R/W
0 0
16-bit Timer/Counter Type A (TCA)
12 11
CMPBUF[15:8]
R/W R/W
0 0
4 3
CMPBUF[7:0]
R/W R/W
0 0
Datasheet Preliminary
®
megaAVR 0-Series
10 9
R/W R/W
0 0
2 1
R/W R/W
0 0
DS40002015A-page 217
8
R/W
0
0
R/W
0