Table 26-2. DFF Characteristics
R
G
1
X
0
1
0
JK Flip-Flop (JK)
The J-input is driven by the even LUT output (LUT2n), and the K-input is driven by the odd LUT output
(LUT2n+1).
Figure 26-8. JK Flip-Flop
Table 26-3. JK Characteristics
R
J
1
X
0
0
0
0
0
1
0
1
Gated D-Latch (DLATCH)
The D-input is driven by the even LUT output (LUT2n), and the G-input is driven by the odd LUT output
(LUT2n+1).
Figure 26-9. D-Latch
Table 26-4. D-Latch Characteristics
G
0
1
1
©
2018 Microchip Technology Inc.
D
X
1
0
X
even LUT
CLK_MUX_OUT
odd LUT
K
X
0
1
0
1
even LUT
D
odd LUT
G
D
X
0
1
Datasheet Preliminary
megaAVR
CCL – Configurable Custom Logic
OUT
Clear
Set
Clear
Hold state (no change)
OUT
Clear
Hold state (no change)
Clear
Set
Toggle
Q
OUT
OUT
Hold state (no change)
Clear
Set
®
0-Series
DS40002015A-page 385
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