Microchip Technology PIC18LF67K40 Manual

64-Pin, Low-Power, High-Performance Microcontrollers
Description
PIC18(L)F67K40 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals,
combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications.
These 64-pin devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider
(CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold
comparisons. They also offer a set of Core Independent Peripherals such as Complementary Waveform Generator
(CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect
(ZCD) and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost.
Core Features
• C Compiler Optimized RISC Architecture
• Only 83 Instructions
• Operating Speed:
- DC – 64 MHz clock input
- 62.5 ns minimum instruction cycle
• Programmable 2-Level Interrupt Priority
• 31-Level Deep Hardware Stack
• Four 8-Bit Timers (TMR2/4/6/8) with Hardware
Limit Timer (HLT)
• Five 16-Bit Timers (TMR0/1/3/5/7)
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Programmable Code Protection
• Windowed Watchdog Timer (WWDT):
- Timer monitoring of overflow and underflow
events
- Variable prescaler selection
- Variable window size selection
- All sources configurable in hardware or
software
Memory
• 128K bytes Program Flash Memory
• 3568 Bytes Data SRAM Memory
• 1024 Bytes Data EEPROM
• Direct, Indirect and Relative Addressing modes
Operating Characteristics
• Operating Voltage Ranges:
- 1.8V to 3.6V (PIC18LF6xK40)
- 2.3V to 5.5V (PIC18F6xK40)
• Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
 2016 Microchip Technology Inc.
with XLP Technology
Power-Saving Operation Modes
• Doze: CPU and Peripherals Running at Different
Cycle Rates (typically CPU is lower)
• Idle: CPU Halted While Peripherals Operate
• Sleep: Lowest Power Consumption
• Peripheral Module Disable (PMD):
- Ability to selectively disable hardware module
eXtreme Low-Power (XLP) Features
• Sleep mode: 50 nA @ 1.8V, typical
• Windowed Watchdog Timer: 500 nA @ 1.8V,
typical
• Secondary Oscillator: 500 nA @ 32 kHz
• Operating Current:
- 8 uA @ 32 kHz, 1.8V, typical
- 32 uA/MHz @ 1.8V, typical
Digital Peripherals
• Complementary Waveform Generator (CWG):
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
• Capture/Compare/PWM (CCP) modules:
- Five CCPs
- 16-bit resolution for Capture/Compare modes
- 10-bit resolution for PWM mode
• 10-Bit Pulse-Width Modulators (PWM):
- Two 10-bit PWMs
• Serial Communications:
- Five Enhanced USART (EUSART) with
- SPI
- I
• 59 I/O Pins and One Input Pin:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change
- Input level selection control
Preliminary
PIC18(L)F67K40
to minimize active power consumption of
unused peripherals
Auto-Baud Detect, Auto-wake-up on Start.
RS-232, RS-485, LIN compatible
2
C, SMBus and PMBus™ compatible
DS40001841B-page 1