Microchip Technology megaAVR 0 Series Manual page 222

Hide thumbs Also See for megaAVR 0 Series:
Table of Contents

Advertisement

19.8.4
Control D
Name: 
CTRLD
Offset: 
0x03
Reset: 
0x00
Property:  -
Bit
7
Access
Reset
Bit 0 – SPLITM Enable Split Mode
This bit sets the timer/counter in Split mode operation. It will then work as two 8-bit timer/counters. The
register map will change compared to normal 16-bit mode.
©
2018 Microchip Technology Inc.
6
5
16-bit Timer/Counter Type A (TCA)
4
3
Datasheet Preliminary
®
megaAVR
0-Series
2
1
SPLITM
DS40002015A-page 222
0
R/W
0

Hide quick links:

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the megaAVR 0 Series and is the answer not in the manual?

Subscribe to Our Youtube Channel

This manual is also suitable for:

Atmega4808Atmega4809Atmega3208Atmega3209

Table of Contents