Microchip Technology megaAVR 0 Series Manual page 73

8.5.4 Interrupt Control
Name: INTCTRL
Offset: 0x03
Reset: 0x00
Property: -
Bit 7
Access
Reset
Bit 0 – EEREADY EEPROM Ready Interrupt
Writing a '1' to this bit enables the interrupt, which indicates that the EEPROM is ready for new write/
erase operations.
This is a level interrupt that will be triggered only when the EEREADY flag in the INTFLAGS register is set
to zero. Thus, the interrupt should not be enabled before triggering an NVM command, as the EEREADY
flag will not be set before the NVM command issued. The interrupt should be disabled in the interrupt
handler.
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2018 Microchip Technology Inc.
6 5
Nonvolatile Memory Controller (NVMCTRL)
4 3
Datasheet Preliminary
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megaAVR 0-Series
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EEREADY
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