Sleep Mode Operation - Microchip Technology megaAVR 0 Series Manual

Name Vector Description
LCMP1 Compare channel 1 interrupt Match between the counter value and the low-byte of Compare
LCMP2 Compare channel 2 interrupt Match between the counter value and the low-byte of the
When an interrupt condition occurs, the corresponding interrupt flag is set in the Interrupt Flags register of
the peripheral (peripheral.INTFLAGS).
An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral's
Interrupt Control register (peripheral.INTCTRL).
An interrupt request is generated when the corresponding interrupt source is enabled and the interrupt
flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral's
INTFLAGS register for details on how to clear interrupt flags.
19.4

Sleep Mode Operation

The timer/counter will continue operation in Idle Sleep mode.
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2018 Microchip Technology Inc.
16-bit Timer/Counter Type A (TCA)
Conditions
1 register.
Compare 2 register.
Datasheet Preliminary
®
megaAVR 0-Series
DS40002015A-page 196