Microchip Technology megaAVR 0 Series Manual page 350

24.5.1 Control A
Name: CTRLA
Offset: 0x00
Reset: 0x00
Property: -
Bit 7
Access
Reset
Bit 4 – SDASETUP SDA Setup Time
By default, there are four clock cycles of setup time on SDA out signal while reading from the slave part
of the TWI module. Writing this bit to '1' will change the setup time to eight clocks.
Value Name
0 4CYC
1 8CYC
Bits 3:2 – SDAHOLD[1:0] SDA Hold Time
Writing these bits selects the SDA hold time.
Table 24-2. SDA Hold Time
SDAHOLD[1:0] Nominal Hold Time Hold Time Range Across
0x0
0x1
0x2
0x3
Bit 1 – FMPEN FM Plus Enable
Writing these bits selects the 1 MHz bus speed (Fast mode plus, Fm+) for the TWI in default configuration
or for TWI Master in dual mode configuration.
Value Description
0 Fm+ disabled
1 Fm+ enabled
©
2018 Microchip Technology Inc.
6 5
SDASETUP
Description
SDA setup time is four clock cycles
SDA setup time is eight clock cycle
All Corners [ns]
OFF 0
50 ns 36 - 131
300 ns 180 - 630
500 ns 300 - 1050
4 3
SDAHOLD[1:0]
R/W R/W
0 0
Datasheet Preliminary
®
megaAVR 0-Series
Two-Wire Interface (TWI)
2 1
FMPEN
R/W R/W
0 0
Description
Hold time OFF.
Backward compatible setting.
Meets SMBus specification under
typical conditions.
Meets SMBus specification across
all corners.
DS40002015A-page 350
0