Microchip Technology megaAVR 0 Series Manual page 253

20.5.9 Count
Name: CNT
Offset: 0x0A
Reset: 0x00
Property: -
The TCBn.CNTL and TCBn.CNTH register pair represents the 16-bit value TCBn.CNT. The low byte [7:0]
(suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset
+ 0x01.
CPU and UPDI write access has priority over internal updates of the register.
Bit 15
Access R/W
Reset 0
Bit 7
Access
R/W
Reset 0
Bits 15:8 – CNT[15:8] Count Value High
These bits hold the MSB of the 16-bit Counter register.
Bits 7:0 – CNT[7:0] Count Value Low
These bits hold the LSB of the 16-bit Counter register.
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2018 Microchip Technology Inc.
14 13
R/W R/W
0 0
6 5
R/W R/W
0 0
16-bit Timer/Counter Type B (TCB)
12 11
CNT[15:8]
R/W R/W
0 0
4 3
CNT[7:0]
R/W R/W
0 0
Datasheet Preliminary
®
megaAVR 0-Series
10 9
R/W R/W
0 0
2 1
R/W R/W
0 0
DS40002015A-page 253
8
R/W
0
0
R/W
0