Microchip Technology megaAVR 0 Series Manual page 442

Figure 29-3. Supported UPDI Frame Formats
Data Data frame consists of one Start bit (always low), eight data bits, one parity bit (even parity),
Frame and two Stop bits (always high). If the Start bit, parity bit, or Stop bits have an incorrect value,
an error will be detected and signalized by the UPDI. The parity bit-check in the UPDI can be
disabled by writing the PARD bit in UPDI.CTRLA, in which case the parity generation from the
debugger can be ignored.
IDLE Special frame that consists of 12 high bits. This is the same as keeping the transmission line
Frame in an Idle state.
BREAK Special frame that consists of 12 low bits. The BREAK frame is used to reset the UPDI back
to its default state and is typically used for error recovery.
SYNCH The SYNCH frame (0x55) is used by the Baud Rate Generator to set the baud rate for the
coming transmission. A SYNCH character is always expected by the UPDI in front of every
new instruction, and after a successful BREAK has been transmitted.
ACK The Acknowledge (ACK) character is transmitted from the UPDI whenever an ST or STS
instruction has successfully crossed the synchronization boundary and have gained bus
access. When an ACK is received by the debugger, the next transmission can start.
29.3.1.1 UPDI UART
All transmission and reception of serial data on the UPDI is achieved using the UPDI frames presented in
Figure 29-3. Communication is initiated from the master (debugger) side, and every transmission must
start with a SYNCH character upon which the UPDI can recover the transmission baud rate, and store
this setting for the coming data. The baud rate set by the SYNCH character will be used for both
reception and transmission for the instruction byte received after the SYNCH. See
for details on when the next SYNCH character is expected in the instruction stream.
There is no writable baud rate register in the UPDI, so the baud rate sampled from the SYNCH character
is used for data recovery by sampling the Start bit, and performing a majority vote on the middle samples.
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2018 Microchip Technology Inc.
S t 0 1 2
S t
Synch Part
S t
Unified Program and Debug Interface (UPDI)
DATA
3 4 5 6
IDLE
BREAK
SYNCH (0x55)
_
End synch
ACK (0x40)
Datasheet Preliminary
®
megaAVR 0-Series
7 P S 1 S 2
P S 1 S 2
P S 1 S 2
UPDI Instruction Set
DS40002015A-page 442