19.8.11 High Byte Timer Counter Register - Split Mode
Name:
HCNT
Offset:
0x21
Reset:
0x00
Property: -
TCAn.HCNT contains the counter value in high byte timer. CPU and UPDI write access has priority over
count, clear, or reload of the counter.
Bit
7
Access
R/W
Reset
0
Bits 7:0 – HCNT[7:0] Counter Value for High Byte Timer
These bits define the counter value in high byte timer.
©
2018 Microchip Technology Inc.
6
5
R/W
R/W
0
0
16-bit Timer/Counter Type A (TCA)
4
3
HCNT[7:0]
R/W
R/W
0
0
Datasheet Preliminary
®
megaAVR
0-Series
2
1
R/W
R/W
0
0
DS40002015A-page 229
0
R/W
0
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