Microchip Technology megaAVR 0 Series Manual page 305

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megaAVR 0-Series
Universal Synchronous and Asynchronous Recei...
Bit 1 – BDF Break Detected Flag
This bit is intended for USART configured to LINAUTO receive mode. The break detector has a fixed
threshold of 11 bits low for a Break to be detected. The BDF bit is set after a valid BREAK and SYNC
character is detected. The bit is automatically cleared when next data is received. The bit will behave
identically when USART is set to GENAUTO mode. In NORMAL or CLK2X receive mode, the BDF bit is
unused.
This bit is cleared by writing a '1' to it.
Bit 0 – WFB Wait For Break
Writing this bit to '1' will register the next low and high transition on RxD line as a Break character. This
can be used to wait for a Break character of arbitrary width. Combined with USART set to GENAUTO
mode, this allows the user to set any BAUD rate through BREAK and SYNC as long as it falls within the
valid range of the USARTn.BAUD register. This bit will always read '0'.
Datasheet Preliminary
DS40002015A-page 305
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