Microchip Technology megaAVR 0 Series Manual page 194

Block Diagram
Figure 19-13. Timer/Counter Block Diagram Split Mode
Base Counter
Counter
Split Mode Initialization
When shifting between Normal mode and Split mode, the functionality of some registers and bits
changes, but their values do not. For this reason, disabling the peripheral (ENABLE=0 in TCAn.CTRLA)
and doing a hard Reset (CMD=RESET in TCAn.CTRLESET) is recommended when changing the mode
to avoid unexpected behavior.
To start using the timer/counter in basic Split mode after a hard Reset, follow these steps:
• Enable Split mode by writing a '1' to the Split mode enable bit in the Control D register (SPLITM in
TCAn.CTRLD)
• Write a TOP value to the Period registers (TCAn.PER)
• Enable the peripheral by writing a '1' to the ENABLE bit in the Control A register (TCAn.CTRLA).
The counter will start counting clock ticks according to the prescaler setting in the Clock Select bit
field (CLKSEL) in TCAn.CTRLA.
• The counter values can be read from the Counter bit field in the Counter registers (TCAn.CNT)
Activating Split mode results in changes to the functionality of some registers and register bits. The
modifications are described in a separate register map.
©
2018 Microchip Technology Inc.
HPER LPER
HCNT LCNT
BOTTOML
= 0
BOTTOMH
= 0
LCMPn
=
HCMPn
=
Datasheet Preliminary
megaAVR
16-bit Timer/Counter Type A (TCA)
Clock Select
CTRLA
"count high"
"load high"
"count low"
Control Logic
"load low"
Compare
(Unit n = {0,1,2})
Waveform
Generation
"match"
Compare
(Unit n = {0,1,2})
Waveform
Generation
"match"
®
0-Series
HUNF
(INT Req.)
LUNF
(INT Req.)
WOn Out
LCMPn
(INT Req.)
WO[n+3] Out
DS40002015A-page 194