18.
Watchdog Timer (WDT)
18.1
Features
•
Issues a System Reset if the Watchdog Timer is not Cleared Before its Time-out Period
•
Operating Asynchronously from System Clock Using an Independent Oscillator
•
Using the 1 KHz Output of the 32 KHz Ultra Low-Power Oscillator (OSCULP32K)
•
11 Selectable Time-out Periods, from 8 ms to 8s
•
Two Operation modes:
–
Normal mode
–
Window mode
•
Configuration Lock to Prevent Unwanted Changes
•
Closed Period Timer Activation After First WDT Instruction for Easy Setup
18.2
Overview
The Watchdog Timer (WDT) is a system function for monitoring correct program operation. It allows the
system to recover from situations such as runaway or deadlocked code, by issuing a Reset. When
enabled, the WDT is a constantly running timer configured to a predefined time-out period. If the WDT is
not reset within the time-out period, it will issue a system Reset. The WDT is reset by executing the WDR
(Watchdog Timer Reset) instruction from software.
The WDT has two modes of operation; Normal mode and Window mode. The settings in the Control A
register (WDT.CTRLA) determine the mode of operation.
A Window mode defines a time slot or "window" inside the time-out period during which the WDT must be
reset. If the WDT is reset outside this window, either too early or too late, a system Reset will be issued.
Compared to the Normal mode, the Window mode can catch situations where a code error causes
constant WDR execution.
When enabled, the WDT will run in Active mode and all Sleep modes. It is asynchronous (i.e., running
from a CPU independent clock source). For this reason, it will continue to operate and be able to issue a
system Reset even if the main clock fails.
The CCP mechanism ensures that the WDT settings cannot be changed by accident. For increased
safety, a configuration for locking the WDT settings is available.
©
2018 Microchip Technology Inc.
Datasheet Preliminary
®
megaAVR
0-Series
Watchdog Timer (WDT)
DS40002015A-page 175
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