Registers And Bits - Microchip Technology megaAVR 0 Series Manual

Symbol
GHz
s
ms
µs
ns
3.4

Registers and Bits

Table 3-4. Register and Bit Mnemonics
Symbol
R/W
R
W
BITFIELD
BITFIELD[n:m] A set of bits from bit n down to m. Example: PINA[3:0] = {PINA3, PINA2, PINA1,
Reserved
PERIPHERAL
n
PERIPHERALx If several instances of the peripheral exist, the peripheral name is followed by a single
Reset
SET/CLR
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2018 Microchip Technology Inc.
Description
Read/Write accessible register bit. The user can read from and write to this bit.
Read-only accessible register bit. The user can only read this bit. Writes will be
ignored.
Write-only accessible register bit. The user can only write this bit. Reading this bit will
return an undefined value.
Bitfield names are shown in uppercase. Example: INTMODE.
PINA0}.
Reserved bits are unused and reserved for future use. Bitfields in the Register
Summary or Register Description chapters that have gray background are Reserved
bits.
For compatibility with future devices, always write reserved bits to zero when the
register is written. Reserved bits will always return zero when read.
Reserved bit field values must not be written to a bit field. A reserved value won't be
read from a read-only bit field.
If several instances of the peripheral exist, the peripheral name is followed by a single
number to identify one instance. Example: USARTn is the collection of all instances of
the USART module, while USART3 is one specific instance of the USART module.
capital letter (A-Z) to identify one instance. Example: PORTx is the collection of all
instances of the PORT module, while PORTB is one specific instance of the PORT
module.
Value of a register after a power Reset. This is also the value of registers in a
peripheral after performing a software Reset of the peripheral, except for the Debug
Control registers.
Registers with SET/CLR suffix allows the user to clear and set bits in a register without
doing a read-modify-write operation. These registers always come in pairs. Writing a '1'
to a bit in the CLR register will clear the corresponding bit in both registers, while
Description
9
1 GHz = 10 Hz = 1,000,000,000 Hz
second
millisecond
microsecond
nanosecond
Datasheet Preliminary
®
megaAVR 0-Series
Conventions
DS40002015A-page 12