Microchip Technology megaAVR 0 Series Manual page 114

12.5.2 Status
Name: STATUS
Offset: 0x01
Reset: 0x00
Property: -
Bit 7
NMIEX
Access R
Reset 0
Bit 7 – NMIEX Non-Maskable Interrupt Executing
This flag is set if a non-maskable interrupt is executing. The flag is cleared when returning (RETI) from
the interrupt handler.
Bit 1 – LVL1EX Level 1 Interrupt Executing
This flag is set when a priority level 1 interrupt is executing, or when the interrupt handler has been
interrupted by an NMI. The flag is cleared when returning (RETI) from the interrupt handler.
Bit 0 – LVL0EX Level 0 Interrupt Executing
This flag is set when a priority level 0 interrupt is executing, or when the interrupt handler has been
interrupted by a priority level 1 interrupt or an NMI. The flag is cleared when returning (RETI) from the
interrupt handler.
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2018 Microchip Technology Inc.
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CPU Interrupt Controller (CPUINT)
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Datasheet Preliminary
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