Microchip Technology megaAVR 0 Series Manual page 46

An interrupt is enabled or disabled by writing to the corresponding Interrupt Enable bit in the peripheral's
Interrupt Control register (peripheral.INTCTRL).
An interrupt request is generated when the corresponding interrupt is enabled and the Interrupt Flag is
set. The interrupt request remains active until the Interrupt Flag is cleared. See the peripheral's
INTFLAGS register for details on how to clear Interrupt Flags.
Note: Interrupts must be enabled globally for interrupt requests to be generated.
Table 6-2. Interrupt Vector Mapping
Vector Vector Address
Number
Program Program
Memory Memory
≤8KB
0 0x00
1 0x01
2 0x02
3 0x03
4 0x04
5 0x05
6 0x06
7 0x07
8 0x08
9 0x09
10 0x0A
11 0x0B
12 0x0C
13 0x0D
14 0x0E
15 0x0F
16 0x10
17 0x11
18 0x12
19 0x13
20 0x14
21 0x15
22 0x16
23 0x17
©
2018 Microchip Technology Inc.
Peripheral Source
>8KB
0x00 RESET
0x02 NMI - Non-Maskable Interrupt from CRC
0x04 VLM - Voltage Level Monitor
0x06 RTC - Overflow or compare match
0x08 PIT - Periodic Interrupt
0x0A CCL - Configurable Custom Logic
0x0C PORTA - External interrupt
0x0E TCA0 - Overflow
0x10 TCA0 - Underflow (Split mode)
0x12 TCA0 - Compare channel 0
0x14 TCA0 - Compare channel 1
0x16 TCA0 - Compare channel 2
0x18 TCB0 - Capture
0x1A TCB1 - Capture
0x1C TWI0 - Slave
0x1E TWI0 - Master
0x20 SPI0 - Serial Peripheral Interface 0
0x22 USART0 - Receive Complete
0x24 USART0 - Data Register Empty
0x26 USART0 - Transmit Complete
0x28 PORTD - External interrupt
0x2A AC0 – Compare
0x2C ADC0 – Result Ready
0x2E ADC0 - Window Compare
Datasheet Preliminary
®
megaAVR 0-Series
Peripherals and Architecture
28-Pin 32-Pin 48-Pin
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DS40002015A-page 46
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