Microchip Technology megaAVR 0 Series Manual page 465

29.5.4 Control B
Name: CTRLB
Offset: 0x03
Reset: 0x00
Property: -
Bit 7
Access
Reset
Bit 4 – NACKDIS Disable NACK Response
Writing this bit to '1' disables the NACK signature sent by the UPDI if a System Reset is issued during an
ongoing LD(S) and ST(S) operation.
Bit 3 – CCDETDIS Collision and Contention Detection Disable
If this bit is written to '1', contention detection is disabled.
Bit 2 – UPDIDIS UPDI Disable
Writing a '1' to this bit disables the UPDI PHY interface. The clock request from the UPDI is lowered, and
the UPDI is reset. All UPDI PHY configurations and KEYs will be reset when the UPDI is disabled.
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2018 Microchip Technology Inc.
6 5
NACKDIS
Unified Program and Debug Interface (UPDI)
4 3
CCDETDIS UPDIDIS
R R
0 0
Datasheet Preliminary
®
megaAVR 0-Series
2 1
R
0
DS40002015A-page 465
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