Microchip Technology megaAVR 0 Series Manual page 293

To transmit, write TXEN in USARTn.CTRLB to '1'. Thereafter, write data to be transmitted to the
USARTn.TXDATA register. After the last byte to transmit has been written to USARTn.TXDATA, write
TXEN in USARTn.CTRLB to '0' to reverse the transmission direction. The USART hardware will not
reverse the direction until the last bit has been transmitted. After the last bit has been transmitted, the
TxD pin direction is controlled by:
• In non-RS-485 Mode: If RS485[1] in USARTn.CTRLA is '0', the PORTx.DDR[n] bit for the pin Pxn
where TxD is located controls the direction.
• In RS-485 Mode: If RS485[1] in USARTn.CTRLA is '1', internal control of TxD direction is provided
as dictated by the RS-485 standard.
For non-RS-485 operation, write PORTx.DDR[n] to '0' prior to starting USART communication. The TXEN
bit in USARTn.CTRLB will then determine the direction as either output driver or input.
The RS-485 mode requires the support of external components to comply with the RS-485 standard.
Either an external line driver is supported as shown in the figure below (the RS485 bit field in
USARTn.CTRLA = 0x1), or control of the transmitter driving the TxD pin is provided (the RS485 bit field in
USARTn.CTRLA = 0x2).
While operating in RS-485 mode, the Transmit Direction pin (XDIR) is driven high when the transmitter is
active.
Figure 22-10. RS-485 Bus Connection
The XDIR pin goes high one baud clock cycle in advance of data being shifted out, to allow some guard
time to enable the external line driver. The XDIR pin will remain high for the complete frame including
Stop bit(s).
Figure 22-11. XDIR Drive Timing
TxD
XDIR
Guard
Related Links
Signal Description
22.3.2.7 Start Frame Detection
The start frame detection is supported in UART mode only. The UART start frame detector is limited to
Standby Sleep mode only and can wake up the system when a Start bit is detected.
©
2018 Microchip Technology Inc.
USART
RxD
XDIR
TxD
St 0 1
time
Universal Synchronous and Asynchronous Recei...
VDD
2 3 4 5
Datasheet Preliminary
®
megaAVR
Differential
bus
6 7 Sp1
Stop
DS40002015A-page 293
0-Series