Crystal Error Correction - Microchip Technology megaAVR 0 Series Manual

Figure 21-2. Timing Between PIT Enable and First Interrupt
Enabling PIT with RTC/Prescaler Disabled
CLK_RTC
prescaler
counter
value (LSb)
prescaler bit 3
(CYC16)
PIT output
Enabling PIT with RTC/Prescaler Enabled
CLK_RTC
prescaler
counter
value (LSb)
prescaler bit 3
(CYC16)
PIT output
21.6

Crystal Error Correction

The prescaler for the RTC and PIT can do internal correction (when CORREN bit in RTC.CTRLA is 1) on
the crystal clock by taking the PPM error value from the CALIB Register.
The CALIB register will be written by software after external calibration or temperature corrections.
Correction is done within an interval of approximately 1 million input clock cycles. The correction
operation is performed as a single cycle operation – adding or removing one cycle, depending on the
nature of error. These single cycle operations will be performed repeatedly the error number of times
(ERROR bits in RTC.CALIB) spread throughout the 1 million cycle correction interval. The correction
spread over this correction interval is based on the error value.
The final correction of the clock will be reflected in the RTC count value available through the RTC.CNTx
registers or in the PIT intervals.
©
2018 Microchip Technology Inc.
PITENABLE=0
1/2 PIT period
(8 CLK_RTC)
write PITENABLE=1
PITENABLE=0
time window for writing
PITENABLE=1
Datasheet Preliminary
megaAVR
Real-Time Counter (RTC)
Continuous Operation
first PIT output
Continuous Operation
first PIT output
®
0-Series
DS40002015A-page 259