Microchip Technology megaAVR 0 Series Manual page 473

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Table 30-4. Memory Space Identifiers
Terminology
DS(X)
DS(Y)
DS(Z)
DS(k)
PS(Z)
I/O(A)
Table 30-5. Operator
Operator
×
+
-
>>
<<
==
Rd(n)
Table 30-6. Arithmetic and Logic Instructions
Opera
Mnemonic
Description
nds
ADD
Rd, Rr
Add without Carry
ADC
Rd, Rr
Add with Carry
ADIW
Rd, K
Add Immediate to Word
SUB
Rd, Rr
Subtract without Carry
SUBI
Rd, K
Subtract Immediate
SBC
Rd, Rr
Subtract with Carry
SBCI
Rd, K
Subtract Immediate with Carry
SBIW
Rd, K
Subtract Immediate from Word
AND
Rd, Rr
Logical AND
ANDI
Rd, K
Logical AND with Immediate
OR
Rd, Rr
Logical OR
ORI
Rd, K
Logical OR with Immediate
©
2018 Microchip Technology Inc.
Meaning
X-pointer points to address in Data Space
Y-pointer points to address in Data Space
Z-pointer points to address in Data Space
Constant k points to address in Data Space
Z-pointer points to address in Program Space
A is an address in I/O Space
Meaning
Arithmetic multiplication
Arithmetic addition
Arithmetic subtraction
Logical AND
Logical OR
Logical XOR
Shift right
Shift left
Comparison
Bit n in register Rd
Op
Rd
Rd
Rd + 1:Rd
Rd
Rd
Rd
Rd
Rd + 1:Rd
Rd
Rd
Rd
Rd
Datasheet Preliminary
®
megaAVR
0-Series
Instruction Set Summary
Flags
Rd + Rr
Z,C,N,V,S,H
Rd + Rr + C
Z,C,N,V,S,H
Rd + 1:Rd + K
Z,C,N,V,S
Rd - Rr
Z,C,N,V,S,H
Rd - K
Z,C,N,V,S,H
Rd - Rr - C
Z,C,N,V,S,H
Rd - K - C
Z,C,N,V,S,H
Rd + 1:Rd - K
Z,C,N,V,S
Rd ∧ Rr
Z,N,V,S
Rd ∧ K
Z,N,V,S
Rd ∨ Rr
Z,N,V,S
Rd ∨ K
Z,N,V,S
DS40002015A-page 473
#Clock
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1
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