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Microchip Technology PIC16F716 Datasheet

Microchip Technology PIC16F716 Datasheet

8-bit flash-based microcontroller with a/d converter and enhanced capture/compare/pwm
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PIC16F716
Data Sheet
8-bit Flash-based Microcontroller
with A/D Converter and
Enhanced Capture/Compare/PWM
Preliminary
 2003 Microchip Technology Inc.
DS41206A

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  • Page 1 PIC16F716 Data Sheet 8-bit Flash-based Microcontroller with A/D Converter and Enhanced Capture/Compare/PWM Preliminary  2003 Microchip Technology Inc. DS41206A...
  • Page 2 Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system...
  • Page 3 C to 85 ° ° - Extended: -40 C to 125 Memory 8-bit A/D Device Timers 8/16 Range (ch) (outputs) Flash Data PIC16F716 2048 x 14 128 x 8 1/2/4 2.0V - 5.5V Preliminary  2003 Microchip Technology Inc. DS41206A-page 1...
  • Page 4 RA0/AN0 RA3/AN3/V OSC1/CLKIN RA4/T0CKI OSC2/CLKOUT MCLR/V RB7/P1D RB0/INT/ECCPAS2 RB6/P1C RB1/T1OSO/T1CKI RB5/P1B RB2/T1OSI RB4/ECCPAS0 RB3/CCP1/P1A 20-pin SSOP RA1/AN1 RA2/AN2 RA0/AN0 RA3/AN3/V OSC1/CLKIN RA4/T0CKI MCLR/V OSC2/CLKOUT RB7/P1D RB0/INT/ECCPAS2 RB6/P1C RB1/T1OSO/T1CKI RB5/P1B RB2/T1OSI RB4/ECCPAS0 RB3/CCP1/P1A Preliminary  2003 Microchip Technology Inc. DS41206A-page 2...

  • Page 5: Table Of Contents

    You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000). Errata Preliminary  2003 Microchip Technology Inc. DS41206A-page 3...
  • Page 6 PIC16F716 NOTES: Preliminary  2003 Microchip Technology Inc. DS41206A-page 4...

  • Page 7: Device Overview

    Figure 1-1 is the block diagram for the PIC16F716 device. The pinouts are listed in Table 1-1. FIGURE 1-1: PIC16F716 BLOCK DIAGRAM PORTA Data Bus...
  • Page 8 = Analog input or output = Open drain O = Output = TTL compatible input = Schmitt Trigger input with CMOS levels P = Power XTAL = Crystal CMOS = CMOS compatible input or output Preliminary  2003 Microchip Technology Inc. DS41206A-page 6...

  • Page 9: Memory Organization

    Program Memory Organization The PIC16F716 has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The PIC16F716 has 2K x 14 words of program memory. Note 1: Maintain Status bit 6 clear to ensure Accessing a location above the physically implemented upward compatibility with future products.
  • Page 10 ADCON1 General General Purpose Purpose Registers Registers 32 Bytes 80 Bytes 16 Bytes Accesses 70-7Fh Bank 0 Bank 1 Unimplemented data memory locations, read as '0'. Note 1: Not a physical register. Preliminary  2003 Microchip Technology Inc. DS41206A-page 8...
  • Page 11 On any device Reset, these pins are configured as inputs. This is the value that will be in the port output latch. Reserved bits, do not use. ECCPAS1 bit is not used on PIC16F716. Preliminary  2003 Microchip Technology Inc.
  • Page 12 The IRP and RP1 bits are reserved. Always maintain these bits clear. On any device Reset, these pins are configured as inputs. This is the value that will be in the port output latch. Reserved bits, do not use. Preliminary  2003 Microchip Technology Inc. DS41206A-page 10...
  • Page 13 The Status register can be the destination for any “Instruction Set Summary.” instruction, as with any other register. If the Status Note 1: The PIC16F716 does not use bits IRP register is the destination for an instruction that affects and RP1 (STATUS<7:6>). Maintain these...
  • Page 14 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 12...
  • Page 15 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 13...
  • Page 16 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 14...
  • Page 17 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 15...
  • Page 18 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 16...
  • Page 19 PCLATH register and those being written to the PCL register. Care should be exercised when modifying the PCL register to jump into a look-up table or program branch Preliminary  2003 Microchip Technology Inc. DS41206A-page 17...
  • Page 20 Data Memory 17Fh 1FFh Bank 0 Bank 1 Bank 2 Bank 3 Note 1: For register file map detail see Figure 2-2. Maintain clear for upward compatibility with future products. Not implemented. Preliminary  2003 Microchip Technology Inc. DS41206A-page 18...

  • Page 21: I/O Ports

    The user must ensure the bits in the TRISA register are RD PORT maintained set when using them as analog inputs. To A/D Converter Note: Setting RA3:0 to output while in Analog mode will force pins to output contents of data latch. Preliminary  2003 Microchip Technology Inc. DS41206A-page 19...
  • Page 22 ---- -000 ---- -000 Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA. Note 1: Reserved bits, do not use. Preliminary  2003 Microchip Technology Inc. DS41206A-page 20...
  • Page 23 Input Buffer RD TRIS RD PORT Schmitt Trigger Buffer RB0/INT RD PORT ECCPAS2: ECCP Auto-shutdown input Note To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). Preliminary  2003 Microchip Technology Inc. DS41206A-page 21...
  • Page 24 TRIS Latch WR TRISB RD TRIS T1OSCEN TTL Buffer RD PORTB TMR1 T1OSO (To RB1) Oscillator Note To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). Preliminary  2003 Microchip Technology Inc. DS41206A-page 22...
  • Page 25 RD TRIS Latch RD PORT Set RBIF From other Note To enable weak pull-ups, set RD PORT RB7:RB4 pins the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). ECCPAS0: ECCP Auto-Shutdown input Preliminary  2003 Microchip Technology Inc. DS41206A-page 23...
  • Page 26 Set RBIF From other RB7:RB4 pins RD PORTB ICSPC - In circuit serial programming clock input Note To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). Preliminary  2003 Microchip Technology Inc. DS41206A-page 24...
  • Page 27 Legend: TTL = TTL input, ST = Schmitt Trigger input, XTAL = Crystal Oscillator input Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt or peripheral input. This buffer is a Schmitt Trigger input when used in Serial Programming mode. Preliminary  2003 Microchip Technology Inc. DS41206A-page 25...
  • Page 28 TRISB PORTB Data Direction Register 1111 1111 1111 1111 OPTION_REG RBPU INTEDG T0CS T0SE 1111 1111 1111 1111 Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB. Preliminary  2003 Microchip Technology Inc. DS41206A-page 26...

  • Page 29: Timer0 Module

    TMR0 Internal clock Programmable RA4/T0CKI Prescaler (2 cycle delay) T0SE T0CS Note T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). Preliminary  2003 Microchip Technology Inc. DS41206A-page 27...
  • Page 30 --11 1111 --11 1111 Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by Timer0 Note 1: Reserved bits, do not use. Preliminary  2003 Microchip Technology Inc. DS41206A-page 28...

  • Page 31: Timer1 Module

    R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 29...
  • Page 32 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by the Timer1 module. Preliminary  2003 Microchip Technology Inc. DS41206A-page 30...

  • Page 33: Timer2 Module

    R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 31...
  • Page 34 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR, all other Resets 0Bh, 8Bh INTCON PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u PIR1 Preliminary  2003 Microchip Technology Inc. DS41206A-page 32...

  • Page 35: Enhanced Capture/Compare/Pwm (Eccp) Module

    PIC16F716 ENHANCED CAPTURE/ COMPARE/PWM (ECCP) MODULE ECCP (Enhanced Capture/Compare/PWM) module contains a 16-bit register, which can operate • 16-bit Capture register • 16-bit Compare register • PWM Master/Slave Duty Cycle register Preliminary  2003 Microchip Technology Inc. DS41206A-page 33...
  • Page 36 When the Capture mode is changed, a false capture interrupt may be generated. The user should keep bit CCP1IE (PIE1<2>) clear to avoid false interrupts and should clear the flag bit CCP1IF following any such change in operating mode. Preliminary  2003 Microchip Technology Inc. DS41206A-page 34...
  • Page 37 — — — CCP1IE TMR2IE TMR1IE -0-- -000 -0-- -000 Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by Capture and Timer1. Preliminary  2003 Microchip Technology Inc. DS41206A-page 35...
  • Page 38 The Timer2 postscaler (see Section 6.0 “Timer2 Module”) is not used in the determination of the PWM frequency. The postscaler could be used to have a servo update rate at a different frequency than the PWM output. Preliminary  2003 Microchip Technology Inc. DS41206A-page 36...
  • Page 39 -0-- -000 Timer2 module’s period register 1111 1111 1111 1111 Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by PWM and Timer2. Preliminary  2003 Microchip Technology Inc. DS41206A-page 37...
  • Page 40 CCP1 pin and latch D.C. PWM1CON Note The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit time base. Preliminary  2003 Microchip Technology Inc. DS41206A-page 38...
  • Page 41 • Duty Cycle = T * (CCPR1L<7:0> : CCP1CON<5:4>) * (TMR2 prescale value) • Delay = 4 * T * (PWM1CON<6:0>) Note 1: Dead-band delay is programmed using the PWM1CON register (Section 7.4.4 “Programmable Dead-Band Delay”). Preliminary  2003 Microchip Technology Inc. DS41206A-page 39...
  • Page 42 Period P1A Modulated (Single Output) Delay Delay P1A Modulated (Half-Bridge) P1B Modulated P1A Active P1B Inactive (Full-Bridge, Forward) P1C Inactive P1D Modulated P1A Inactive P1B Modulated (Full-Bridge, Reverse) P1C Active P1D Inactive Preliminary  2003 Microchip Technology Inc. DS41206A-page 40...
  • Page 43 • Duty Cycle = T * (CCPR1L<7:0> : CCP1CON<5:4>) * (TMR2 prescale value) • Delay = 4 * T * (PWM1CON<6:0>) Note 1: Dead-band delay is programmed using the PWM1CON register (Section 7.4.4 “Programmable Dead-Band Delay”). Preliminary  2003 Microchip Technology Inc. DS41206A-page 41...
  • Page 44 Output signals are shown as active-high. FIGURE 7-11: EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS Standard Half-Bridge Circuit (“Push-Pull”) PIC16F716 Driver Load Driver Half-Bridge Output Driving a Full-Bridge Circuit PIC16F716 Driver Driver Load Driver Driver Preliminary  2003 Microchip Technology Inc. DS41206A-page 42...
  • Page 45 (P1B and P1D) remain inactive. This relationship is shown in Figure 7-13. Preliminary  2003 Microchip Technology Inc. DS41206A-page 43...
  • Page 46 Shoot-Through Current Note 1: All signals are shown as active-high. is the turn-on delay of power switch QC and its driver. is the turn-off delay of power switch QD and its driver. Preliminary  2003 Microchip Technology Inc. DS41206A-page 44...
  • Page 47 PWM period. When the ECCPASE bit is cleared, the PWM outputs will return to normal operation at the beginning of the next PWM period. Note: Writing to the ECCPASE bit is disabled while a shutdown condition is active. Preliminary  2003 Microchip Technology Inc. DS41206A-page 45...
  • Page 48 W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 46...
  • Page 49 FIGURE 7-16: PWM AUTO-SHUTDOWN (PRSEN = 0, AUTO-RESTART DISABLED) PWM Period Shutdown Event ECCPASE bit Activity Normal PWM ECCPASE Cleared by Firmware Start of Shutdown Shutdown PWM Period Event Occurs Event Clears Resumes Preliminary  2003 Microchip Technology Inc. DS41206A-page 47...
  • Page 50 PDC1 PDC0 0000 0000 0000 0000 Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the ECCP module in enhanced PWM mode. Preliminary  2003 Microchip Technology Inc. DS41206A-page 48...

  • Page 51: Analog-To-Digital Converter (A/D) Module

    R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 49...
  • Page 52 For the next conversion, go to step 1 or step 2 as required. The A/D conversion time per bit is defined as T . A minimum wait of 2T required before next acquisition starts. Preliminary  2003 Microchip Technology Inc. DS41206A-page 50...
  • Page 53 = leakage current at the pin due to various junctions = interconnect resistance = sampling switch = sample/hold capacitance (from DAC) HOLD 5 6 7 8 9 10 11 Sampling Switch (kΩ) Preliminary  2003 Microchip Technology Inc. DS41206A-page 51...
  • Page 54 For faster conversion times, the selection of another clock source is recommended. When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for Sleep operation only. Preliminary  2003 Microchip Technology Inc. DS41206A-page 52...
  • Page 55 PCFG0 ---- -000 ---- -000 Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for A/D conversion. Note Reserved bit, do not use. Preliminary  2003 Microchip Technology Inc. DS41206A-page 53...

  • Page 57: Special Features Of The Cpu

    The configuration bits can be programmed (read as ‘0’) or left unprogrammed (read as ‘1’) to select various The PIC16F716 device has a host of features intended device configurations. These bits are mapped in to maximize system reliability, minimize cost through program memory location 2007h.
  • Page 58 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = bit is set ‘0’ = bit is cleared x = bit is unknown Preliminary  2003 Microchip Technology Inc. DS41206A-page 56...
  • Page 59 9.2.1 OSCILLATOR TYPES Mode Freq OSC1 (C1) OSC2 (C2) The PIC16F716 can be operated in four different oscillator modes. The user can program two 455 kHz 68-100 pF 68-100 pF configuration bits (FOSC1 and FOSC0) to select one of 2.0 MHz...
  • Page 60 PIC16F716 9.2.3 RC OSCILLATOR Preliminary  2003 Microchip Technology Inc. DS41206A-page 58...
  • Page 61 The Power-up Timer provides a fixed nominal time-out, on power-up only, from the POR. The Power-up Timer The PIC16F716 has on-chip Brown-out Reset circuitry. operates on an internal RC oscillator. The chip is kept A configuration bit, BOREN, can disable (if clear/pro- in Reset as long as the PWRT is active.
  • Page 62 This is a separate oscillator from the RC oscillator of the CLKIN FIGURE 9-6: BROWN-OUT SITUATIONS (PWRTE = 0 Internal 72 ms Reset Internal <72 ms 72 ms Reset Internal 72 ms Reset Preliminary  2003 Microchip Technology Inc. DS41206A-page 60...
  • Page 63 = 0.7 V R1 + R2 2: Internal Brown-out Reset should be disabled when using this circuit. 3: Resistors should be adjusted for the characteristics of the transistor. Preliminary  2003 Microchip Technology Inc. DS41206A-page 61...
  • Page 64 Power-on Reset. (Figure 9-12). This is useful for testing purposes or to Bit 1 is POR (Power-on Reset Status bit). It is cleared synchronize more than one PIC16F716 device on a Power-on Reset and unaffected otherwise. The operating in parallel.
  • Page 65 Legend: u = unchanged, x = unknown, - = unimplemented bit read as ‘0’. Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). Preliminary  2003 Microchip Technology Inc. DS41206A-page 63...
  • Page 66 PIC16F716 TABLE 9-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS OF THE PIC16F716 Power-on Reset, MCLR Resets Wake-up via WDT or Register Brown-out Reset WDT Reset Interrupt xxxx xxxx uuuu uuuu uuuu uuuu INDF TMR0 xxxx xxxx uuuu uuuu uuuu uuuu 0000h...
  • Page 67 INTERNAL POR PWRT PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-12: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO V ): CASE 2 MCLR INTERNAL POR PWRT PWRT TIME-OUT OST TIME-OUT INTERNAL RESET Preliminary  2003 Microchip Technology Inc. DS41206A-page 65...
  • Page 68 Interrupts The peripheral interrupt flags are contained in the special function registers, PIR1 and PIR2. The The PIC16F716 devices have up to 7 sources of corresponding interrupt enable bits are contained in interrupt. The Interrupt Control Register (INTCON) special function registers, PIE1 and PIE2, and the records individual interrupt requests in flag bits.
  • Page 69 ;Move W into PCLATH SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W MOVWF STATUS ;Move W into STATUS register SWAPF W_TEMP,F ;Swap W_TEMP SWAPF W_TEMP,W ;Swap W_TEMP into W RETFIE ;Return from interrupt and enable GIE Preliminary  2003 Microchip Technology Inc. DS41206A-page 67...
  • Page 70 BOREN — — PWRTE WDTE FOSC1 FOSC0 OPTION_REG RBPU INTEDG T0CS T0SE Legend: Shaded cells are not used by the Watchdog Timer. Note 1: See Register 9-1 for operation of these bits. Preliminary  2003 Microchip Technology Inc. DS41206A-page 68...
  • Page 71 PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruction should be executed before a SLEEP instruction. Preliminary  2003 Microchip Technology Inc. DS41206A-page 69...
  • Page 72 In-Circuit Serial Programming™ (ICSP™) readable and writable during program/verify. It is Specification, (DS40245). recommended that only the 4 Least Significant bits of the ID location are used. Preliminary  2003 Microchip Technology Inc. DS41206A-page 70...

  • Page 73: Instruction Set Summary

    10.0 INSTRUCTION SET SUMMARY The instruction set is highly orthogonal and is grouped into three basic categories: Each PIC16F716 instruction is a 14-bit word divided • Byte-oriented operations into an opcode which specifies the instruction type and • Bit-oriented operations one or more operands which further specify the •...
  • Page 74 2: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared if assigned to the Timer0 Module. 3: If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP. Preliminary  2003 Microchip Technology Inc. DS41206A-page 72...
  • Page 75 Example ADDWF REG1, 0 Before Instruction = 0x17 Before Instruction REG1 = 0xC2 = 0x17 After Instruction REG1 = 0xC2 = 0x17 After Instruction REG1 = 0x02 = 0xD9 REG1 = 0xC2 Preliminary  2003 Microchip Technology Inc. DS41206A-page 73...
  • Page 76 PC = address TRUE if REG<1>=1, Description: Bit ‘b’ in register ‘f’ is set. PC = address FALSE Words: Cycles: Example REG1, 7 Before Instruction REG1 = 0x0A After Instruction REG1 = 0x8A Preliminary  2003 Microchip Technology Inc. DS41206A-page 74...
  • Page 77 0001 1fff ffff Description: The contents of register ‘f’ are cleared and the Z bit is set. Words: Cycles: Example CLRF REG1 Before Instruction REG1 = 0x5A After Instruction REG1 = 0x00 Preliminary  2003 Microchip Technology Inc. DS41206A-page 75...
  • Page 78 DECF CNT, 1 Cycles: Before Instruction Example CLRWDT CNT = 0x01 Before Instruction WDT counter = ? After Instruction After Instruction CNT = 0x00 WDT counter = 0x00 WDT prescaler = 0 Preliminary  2003 Microchip Technology Inc. DS41206A-page 76...
  • Page 79 REG1, 1 GOTO LOOP CONTINUE • • • Before Instruction address HERE After Instruction REG1 = REG1 - 1 if REG1 = 0, = address CONTINUE if REG1 ≠ 0, = address HERE+1 Preliminary  2003 Microchip Technology Inc. DS41206A-page 77...
  • Page 80 LOOP CONTINUE • • • Before Instruction = address HERE After Instruction REG1 = REG1 + 1 if CNT = 0, PC = address CONTINUE if REG1≠ 0, = address HERE +1 Preliminary  2003 Microchip Technology Inc. DS41206A-page 78...
  • Page 81 REG1, 0 Words: Before Instruction Cycles: REG1 = 0x13 Example MOVF REG1, 0 = 0x91 After Instruction After Instruction REG1 = 0x13 W= value in REG1 register = 0x93 Z = 1 Preliminary  2003 Microchip Technology Inc. DS41206A-page 79...
  • Page 82 PC. Interrupts are enabled by setting Global Example Interrupt Enable bit, GIE (INTCON<7>). This is a two-cycle instruction. Words: Cycles: Example RETFIE After Interrupt PC = TOS GIE = 1 Preliminary  2003 Microchip Technology Inc. DS41206A-page 80...
  • Page 83 Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two-cycle instruction. Words: Cycles: Example RETURN After Interrupt PC = TOS Preliminary  2003 Microchip Technology Inc. DS41206A-page 81...
  • Page 84 The power-down Status bit, PD is cleared. Time out Status bit, TO is set. Watchdog Timer and its prescaler are cleared. The processor is put into Sleep mode with the oscillator stopped. Words: Cycles: Example: SLEEP Preliminary  2003 Microchip Technology Inc. DS41206A-page 82...
  • Page 85 REG1 = 1 Cycles: Example To maintain upward compatibil- After Instruction ® ity with future PICmicro products, do not use this REG1 = 0xFF instruction. = 0; result is negative = DC = 0 Preliminary  2003 Microchip Technology Inc. DS41206A-page 83...
  • Page 86 Example: XORLW 0xAF Cycles: Before Instruction Example XORWF REG1, 1 W = 0xB5 Before Instruction After Instruction REG1 = 0xAF W = 0x1A = 0xB5 After Instruction REG1 = 0x1A = 0xB5 Preliminary  2003 Microchip Technology Inc. DS41206A-page 84...

  • Page 87: Development Support

    The MPASM assembler features include: • Integration into MPLAB IDE projects • User defined macros to streamline assembly code • Conditional assembly for multi-purpose source files • Directives that allow complete control over the assembly process Preliminary  2003 Microchip Technology Inc. DS41206A-page 85...
  • Page 88 For easy source level debugging, the compilers provide symbol information that is optimized to the MPLAB IDE debugger. 11.4 MPLINK Object Linker/ MPLIB Object Librarian The MPLINK object linker combines relocatable objects created by the MPASM assembler and the Preliminary  2003 Microchip Technology Inc. DS41206A-page 86...
  • Page 89 The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. Preliminary  2003 Microchip Technology Inc. DS41206A-page 87...
  • Page 90 Some of the features include an RS-232 interface, a 2 x 16 LCD display, a piezo speaker, an on-board temperature sensor, four LEDs, and sample PIC18F452 and PIC16F877 Flash microcontrollers. Preliminary  2003 Microchip Technology Inc. DS41206A-page 88...
  • Page 91 Development Environment) software, software ® and hardware "Tips 'n Tricks for 8-pin Flash PIC Microcontrollers" Handbook and a USB Interface Cable. Supports all current 8/14-pin Flash PIC microcontrollers, as well as many future planned devices. Preliminary  2003 Microchip Technology Inc. DS41206A-page 89...
  • Page 92 PIC16F716 NOTES: Preliminary  2003 Microchip Technology Inc. DS41206A-page 90...

  • Page 93: Electrical Characteristics

    This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Preliminary  2003 Microchip Technology Inc. DS41206A-page 91...
  • Page 94 PIC16F716 FIGURE 12-1: PIC16F716 VOLTAGE-FREQUENCY GRAPH, -40°C < TA < +85°C (Volts) Frequency (MHz) Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16F716 VOLTAGE-FREQUENCY GRAPH, 85°C < TA < +125°C (Volts) Frequency (MHz) Note 1: The shaded region indicates the permissible combinations of voltage and frequency.
  • Page 95 PIC16F716 12.1 DC Characteristics: PIC16F716 (Industrial, Extended) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ T ≤ +85°C for industrial DC CHARACTERISTICS -40°C ≤ T ≤ +125°C for extended Param Characteristic Typ† Max Units Conditions Supply Voltage D001 —...
  • Page 96 PIC16F716 12.2 DC Characteristics: PIC16F716 (Industrial) Standard Operating Conditions (unless otherwise stated) DC CHARACTERISTICS Operating temperature -40°C ≤ T ≤ +85°C Para Characteristic Typ† Max Units V Conditions m No. Supply Voltage D001 — — Power-down Base Current µA —...
  • Page 97 PIC16F716 12.3 DC Characteristics: PIC16F716 (Extended) Standard Operating Conditions (unless otherwise stated) DC CHARACTERISTICS Operating temperature -40°C ≤ T ≤ +125°C Param Characteristic Typ† Max Units V Conditions Supply Voltage D001 — — Power-down Base Current µA — WDT, BOR and T1OSC: disabled D020E µA...
  • Page 98 Operating temperature -40°C ≤ T ≤ +125°C for extended DC CHARACTERISTICS Operating voltage V range as described in DC spec Section 12.1 “DC Charac- teristics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Character- istics: PIC16F716 (Industrial, Extended)”. Param Characteristic Typ† Units...
  • Page 99 Operating temperature -40°C ≤ T ≤ +125°C for extended DC CHARACTERISTICS Operating voltage V range as described in DC spec Section 12.1 “DC Charac- teristics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Character- istics: PIC16F716 (Industrial, Extended)”. Param Characteristic Typ† Units...
  • Page 100 ≤ +125°C for extended AC CHARACTERISTICS Operating voltage V range as described in DC spec Section 12.1 “DC Character- istics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Characteristics: PIC16F716 (Industrial, Extended)”. LC parts operate for commercial/industrial temp’s only. FIGURE 12-3:...
  • Page 101 All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. Preliminary  2003 Microchip Technology Inc. DS41206A-page 99...
  • Page 102 †† These parameters are asynchronous events not related to any internal clock edge. Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x T Preliminary  2003 Microchip Technology Inc. DS41206A-page 100...
  • Page 103 — (D005) These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Preliminary  2003 Microchip Technology Inc. DS41206A-page 101...
  • Page 104 7Tosc — These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Preliminary  2003 Microchip Technology Inc. DS41206A-page 102...
  • Page 105 — — These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Preliminary  2003 Microchip Technology Inc. DS41206A-page 103...
  • Page 106 PIC16F716 TABLE 12-7: A/D CONVERTER CHARACTERISTICS: PIC16F716 (INDUSTRIAL, EXTENDED) Para Characteristic Typ† Units Conditions Operation — Resolution — — 8-bits = 5.12V, ≤ V ≤ V Total Absolute error — — < ± 1 LSb V = 5.12V, ≤ V ≤...
  • Page 107 Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following T cycle. See Section 12.1 “DC Characteristics: PIC16F716 (Industrial, Extended)” for min. conditions. Preliminary  2003 Microchip Technology Inc. DS41206A-page 105...
  • Page 108 PIC16F716 NOTES: Preliminary  2003 Microchip Technology Inc. DS41206A-page 106...

  • Page 109: Dc And Ac Characteristics Graphs And Tables

    25°C. 'Max' or 'min' represents (mean + 3σ) (mean - 3σ) respectively, where σ is standard deviation, over the whole temperature range. Graphs and Tables not available at this time. Preliminary  2003 Microchip Technology Inc. DS41206A-page 107...
  • Page 110 PIC16F716 NOTES: Preliminary  2003 Microchip Technology Inc. DS41206A-page 108...

  • Page 111: Packaging Information

    Standard PICmicro device marking consists of Microchip part number, year code, week code, and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. Preliminary  2003 Microchip Technology Inc. DS41206A-page 109...
  • Page 112 § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-007 Preliminary  2003 Microchip Technology Inc. DS41206A-page 110...
  • Page 113 § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-051 Preliminary  2003 Microchip Technology Inc. DS41206A-page 111...
  • Page 114 Lead Thickness .004 .007 .010 0.10 0.18 0.25 φ Foot Angle 0.00 101.60 203.20 Lead Width .010 .013 .015 0.25 0.32 0.38 α Mold Draft Angle Top β Mold Draft Angle Bottom Preliminary  2003 Microchip Technology Inc. DS41206A-page 112...

  • Page 115: Appendix A: Revision History

    Original data sheet. However, the device described in PIC16C716 device. Refer to the migration document, this data sheet are upgrades to PIC16C716. DS40059, for more information about differences between the PIC16F716 and PIC16C716. Preliminary  2003 Microchip Technology Inc. DS41206A-page 113...

  • Page 116: Appendix C: Migration From Base-Line To Mid-Range Devices

    PIC16F716 APPENDIX C: MIGRATION FROM To convert code written for PIC16C5X to PIC16F716, the user should take the following steps: BASE-LINE TO Remove any program memory page select MID-RANGE DEVICES operations (PA2, PA1, PA0 bits) for CALL, GOTO. This section discusses how to migrate from a baseline Revisit any computed jump operations (write to device (i.e., PIC16C5X) to a mid-range device (i.e.,...

  • Page 117: On-Line Support

    • Microchip Consultant Program Member Listing • Links to other useful web sites related to Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events Preliminary  2003 Microchip Technology Inc. DS41206A-page 115...

  • Page 118: Reader Response

    5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? Preliminary  2003 Microchip Technology Inc. DS41206A-page 116...

  • Page 119: Index

    PICDEM 17..............88 BOR. See Brown-out Reset PICDEM 18R PIC18C601/801 ........89 Brown-out Detect (BOD) ............. 59 PICDEM 2 Plus............88 Brown-out Reset (BOR) ........55, 58, 62, 63 PICDEM 3 PIC16C92X..........88 Preliminary  2003 Microchip Technology Inc. DS41206A-page 117...
  • Page 120 MPLAB ICD 2 In-Circuit Debugger ........87 RLF ................81 MPLAB ICE 2000 High Performance Universal RRF................82 In-Circuit Emulator ............87 SLEEP ................ 82 MPLAB ICE 4000 High Performance Universal SUBLW ............... 82 In-Circuit Emulator ............87 Preliminary  2003 Microchip Technology Inc. DS41206A-page 118...
  • Page 121 Rate Select (PS2:PS0 Bits) ........12, 27 Switching Between Timer0 and WDT ......28 Power-down Mode. See Sleep Power-on Reset (POR) ........55, 58, 62, 63 Oscillator Start-up Timer (OST) ......55, 59 Preliminary  2003 Microchip Technology Inc. DS41206A-page 119...
  • Page 122 Special Features of the CPU..........55 CLKOUT and I/O ............100 Special Function Registers ........... 9 External Clock............. 98 Speed, Operating ..............1 Oscillator Start-up Timer (OST) ........ 101 Stack ................... 17 Power-up Timer (PWRT) .......... 101 Preliminary  2003 Microchip Technology Inc. DS41206A-page 120...
  • Page 123 Time-out Period ............67 Timing Diagram............101 WDT Reset, Normal Operation ....... 58, 62, 63 WDT Reset, Sleep .......... 58, 62, 63 WWW, On-Line Support ............3 XORLW Instruction ............. 84 XORWF Instruction ............. 84 Preliminary  2003 Microchip Technology Inc. DS41206A-page 121...
  • Page 124 PIC16F716 NOTES: Preliminary  2003 Microchip Technology Inc. DS41206A-page 122...

  • Page 125: Product Identification System

    Examples: Device Temperature Package Pattern PIC16F716 -I/P 301= Industrial temp., PDIP package, QTP pattern #301. Range PIC16F716 - E/SO = Extended temp, SOIC package Device PIC16F716, PIC16F716T, V range 2.0V to 5.5V Temperature Range = -40°C to +85°C (Industrial) = -40°C to +125°C (Extended)
  • Page 126 Tel: 91-80-2290061 Fax: 91-80-2290062 Winnersh Triangle Japan Wokingham Berkshire, England RG41 5TU Benex S-1 6F Tel: 44-118-921-5869 3-18-20, Shinyokohama Fax: 44-118-921-5820 Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122 07/28/03 Preliminary  2003 Microchip Technology Inc. DS41206A-page 124...

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