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23.4
Register Summary - SPIn
Offset
Name
Bit Pos.
0x00
CTRLA
0x01
CTRLB
0x02
Reserved
0x03
INTFLAGS
0x03
INTFLAGS
0x04
DATA
23.5
Register Description
©
2018 Microchip Technology Inc.
7:0
DORD
7:0
BUFEN
BUFWR
7:0
IF
WRCOL
7:0
RXCIF
TXCIF
7:0
Serial Peripheral Interface (SPI)
MASTER
CLK2X
DREIF
SSIF
DATA[7:0]
Datasheet Preliminary
®
megaAVR
0-Series
PRESC[1:0]
SSD
MODE[1:0]
DS40002015A-page 327
ENABLE
BUFOVF
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