Microchip Technology megaAVR 0 Series Manual page 132

14.3.2 PORTMUX Control for CCL
Name: CCLROUTEA
Offset: 0x01
Reset: 0x00
Property: -
Bit 7
Access
Reset
Bit 3 – LUT3 CCL LUT 3 output
Write this bit to '1' to select alternative pin location for CCL LUT 3.
Value Name
0x0 DEFAULT
0x1 ALT1
Bit 2 – LUT2 CCL LUT 2 output
Write this bit to '1' to select alternative pin location for CCL LUT 2.
Value Name
0x0 DEFAULT
0x1 ALT1
Bit 1 – LUT1 CCL LUT 1 output
Write this bit to '1' to select alternative pin location for CCL LUT 1.
Value Name
0x0 DEFAULT
0x1 ALT1
Bit 0 – LUT0 CCL LUT 0 output
Write this bit to '1' to select alternative pin location for CCL LUT 0.
Value Name
0x0 DEFAULT
0x1 ALT1
©
2018 Microchip Technology Inc.
6 5 4 3
LUT3
R/W
0
Description
CCL LUT3 on PF[3]
CCL LUT3 on PF[6]
Description
CCL LUT2 on PD[3]
CCL LUT2 on PD[6]
Description
CCL LUT1 on PC[3]
CCL LUT1 on PC[6]
Description
CCL LUT0 on PA[3]
CCL LUT0 on PA[6]
Datasheet Preliminary
®
megaAVR 0-Series
Port Multiplexer (PORTMUX)
2 1
LUT2 LUT1
R/W R/W
0 0
DS40002015A-page 132
0
LUT0
R/W
0