ST STM32F205 series Reference Manual page 1024

USB on-the-go full-speed (OTG_FS)
Bit 5 INEPNMM: IN token received with EP mismatch mask
Bit 4 ITTXFEMSK: IN token received when TxFIFO empty mask
Bit 3 TOM: Timeout condition mask (Non-isochronous endpoints)
Bit 2 Reserved, must be kept at reset value.
Bit 1 EPDM: Endpoint disabled interrupt mask
Bit 0 XFRCM: Transfer completed interrupt mask
OTG_FS device OUT endpoint common interrupt mask register
(OTG_FS_DOEPMSK)
Address offset: 0x814
Reset value: 0x0000 0000
This register works with each of the OTG_FS_DOEPINTx registers for all endpoints to
generate an interrupt per OUT endpoint. The OUT endpoint interrupt for a specific status in
the OTG_FS_DOEPINTx register can be masked by writing into the corresponding bit in this
register. Status bits are masked by default.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:14 Reserved, must be kept at reset value.
Bit 13 NAKMSK: NAK interrupt mask
Bit 12 BERRM: Babble error interrupt mask
Bits 11:9 Reserved, must be kept at reset value.
Bit 8 OUTPKTERRM: Out packet error mask
1024/1378
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
Reserved
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
Reserved
rw rw
RM0033 Rev 8
9 8 7 6 5 4 3
rw rw rw rw
RM0033
2 1 0
rw rw