USB on-the-go full-speed (OTG_FS)
1.
To save power, the application suspends and turns off port power when the bus is idle
by writing the port suspend and port power bits in the host port control and status
register.
2.
PHY indicates port power off by deasserting the VBUS_VALID signal.
3.
The device must detect SE0 for at least 2 ms to start SRP when V
4.
To initiate SRP, the device turns on its data line pull-up resistor for 5 to 10 ms. The
OTG_FS controller detects data-line pulsing.
5.
The device drives V
pulsing.
The OTG_FS controller interrupts the application on detecting SRP. The Session
request detected bit is set in Global interrupt status register (SRQINT set in
OTG_FS_GINTSTS).
6.
The application must service the Session request detected interrupt and turn on the
port power bit by writing the port power bit in the host port control and status register.
The PHY indicates port power-on by asserting the VBUS_VALID signal.
7.
When the USB is powered, the device connects, completing the SRP process.
B-device session request protocol
The application must set the SRP-capable bit in the Core USB configuration register. This
enables the OTG_FS controller to initiate SRP as a B-device. SRP is a means by which the
OTG_FS controller can request a new session from the host.
VBUS_VALID
B_VALID
DISCHRG_VBUS
SESS_END
DP
DM
CHRG_VBUS
1. VBUS_VALID = V
B_VALID = B-peripheral valid session to PHY
DISCHRG_VBUS = discharge signal to PHY
SESS_END = session end signal to PHY
CHRG_VBUS = charge V
DP = Data plus line
DM = Data minus line
1092/1378
above the A-device session valid (2.0 V minimum) for V
BUS
Figure 370. B-device SRP
Suspend
1
2
3
4
Low
valid signal from PHY
BUS
signal to PHY
BUS
RM0033 Rev 8
6
5
Data line pulsing
7
V
RM0033
power is off.
BUS
BUS
8
Connect
pulsing
BUS
ai15682
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