Figure 251. Transfer Sequence Flowchart For Slave Receiver With Nostretch=0 - ST STM32F446 Series Reference Manual

Advanced arm-based 32-bit mcus

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Fast-mode Plus Inter-integrated circuit (FMPI2C) interface

Slave receiver

RXNE is set in FMPI2C_ISR when the FMPI2C_RXDR is full, and generates an interrupt if

RXIE is set in FMPI2C_CR1. RXNE is cleared when FMPI2C_RXDR is read.

When a STOP is received and STOPIE is set in FMPI2C_CR1, STOPF is set in

FMPI2C_ISR and an interrupt is generated.

Figure 251. Transfer sequence flowchart for slave receiver with NOSTRETCH=0

RM0390 Rev 4

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