ST STM32F205 series Reference Manual page 1125

RM0033
Bit 10 HSHNPEN: Host set HNP enable
The application sets this bit when it has successfully enabled HNP (using the
SetFeature.SetHNPEnable command) on the connected device.
0: Host Set HNP is not enabled
1: Host Set HNP is enabled
Note: Only accessible in host mode.
Bit 9 HNPRQ: HNP request
The application sets this bit to initiate an HNP request to the connected USB host. The
application can clear this bit by writing a 0 when the host negotiation success status change
bit in the OTG interrupt register (HNSSCHG bit in OTG_HS_GOTGINT) is set. The core
clears this bit when the HNSSCHG bit is cleared.
0: No HNP request
1: HNP request
Note: Only accessible in peripheral mode.
Bit 8 HNGSCS: Host negotiation success
The core sets this bit when host negotiation is successful. The core clears this bit when the
HNP Request (HNPRQ) bit in this register is set.
0: Host negotiation failure
1: Host negotiation success
Note: Only accessible in peripheral mode.
Bits 7:2 Reserved, must be kept at reset value.
Bit 1 SRQ: Session request
The application sets this bit to initiate a session request on the USB. The application can
clear this bit by writing a 0 when the host negotiation success status change bit in the OTG
Interrupt register (HNSSCHG bit in OTG_HS_GOTGINT) is set. The core clears this bit when
the HNSSCHG bit is cleared.
If you use the USB 1.1 full-speed serial transceiver interface to initiate the session request,
the application must wait until V
register (BSVLD bit in OTG_HS_GOTGCTL) is cleared.
0: No session request
1: Session request
Note: Only accessible in peripheral mode.
Bit 0 SRQSCS: Session request success
The core sets this bit when a session request initiation is successful.
0: Session request failure
1: Session request success
Note: Only accessible in peripheral mode.
OTG_HS interrupt register (OTG_HS_GOTGINT)
Address offset: 0x04
Reset value: 0x0000 0000
The application reads this register whenever there is an OTG interrupt and clears the bits in
this register to clear the OTG interrupt.
USB on-the-go high-speed (OTG_HS)
discharges to 0.2 V, after the B-Session Valid bit in this
BUS
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